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/ Monster Media 1996 #15 / Monster Media Number 15 (Monster Media)(July 1996).ISO / graphics / gtw95268.zip / GTW95268.EXE / STL00019.DA_ / STL00019.DA
Text File  |  1996-05-01  |  155KB  |  4,480 lines
  1. #
  2. #    $Id: stl00019.da@ 2.7 1996/03/01 12:17:34 kevinw Stable $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl00019.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 4MB, IBM 526 220Mhz DAC.
  10. #
  11.  
  12. [Objects]
  13. Draweng32=s3x6832.drw
  14. Dac=ibm525.dac
  15. Cursor=ibm525.cur
  16. PixClk=ibm525.clk
  17. Draweng=s3x68.drw
  18.  
  19. [BoardInfo]
  20. bViewports=1
  21. bNewMMIO=1
  22. bTwoPtLine=1
  23. ValidateBAR=YES
  24. SwapVLA30A25=YES
  25.  
  26. [Desktops]
  27. 2048,1536,8
  28. 2048,768,8
  29. 1600,1200,16
  30. 1600,1200,8
  31. 1280,1024,24
  32. 1280,1024,16
  33. 1280,1024,8
  34. 1152,864,32
  35. 1152,864,24
  36. 1152,864,16
  37. 1152,864,8
  38. 1024,3072,8
  39. 1024,1536,16
  40. 1024,1536,8
  41. 1024,768,32
  42. 1024,768,24
  43. 1024,768,16
  44. 1024,768,8
  45. 800,600,32
  46. 800,600,24
  47. 800,600,16
  48. 800,600,8
  49. 640,480,32
  50. 640,480,24
  51. 640,480,16
  52. 640,480,8
  53.  
  54. [Viewports]
  55. 1600,1200,16,95,76
  56. 1600,1200,16,94,75
  57. 1600,1200,16,82,66
  58. 1600,1200,16,75,60
  59. 1600,1200,8,95,76
  60. 1600,1200,8,94,75
  61. 1600,1200,8,82,66
  62. 1600,1200,8,75,60
  63. 1280,1024,24,79,75
  64. 1280,1024,24,76,72
  65. 1280,1024,24,64,60
  66. 1280,1024,16,95,90
  67. 1280,1024,16,79,75
  68. 1280,1024,16,76,72
  69. 1280,1024,16,64,60
  70. 1280,1024,8,95,90
  71. 1280,1024,8,79,75
  72. 1280,1024,8,76,72
  73. 1280,1024,8,64,60
  74. 1152,864,32,64,70
  75. 1152,864,32,56,60
  76. 1152,864,24,64,70
  77. 1152,864,24,56,60
  78. 1152,864,16,82,90
  79. 1152,864,16,71,75
  80. 1152,864,16,64,70
  81. 1152,864,16,56,60
  82. 1152,864,8,82,90
  83. 1152,864,8,71,75
  84. 1152,864,8,64,70
  85. 1152,864,8,56,60
  86. 1024,768,32,64,80
  87. 1024,768,32,60,75
  88. 1024,768,32,58,72
  89. 1024,768,32,56,70
  90. 1024,768,32,48,60
  91. 1024,768,24,64,80
  92. 1024,768,24,60,75
  93. 1024,768,24,58,72
  94. 1024,768,24,56,70
  95. 1024,768,24,48,60
  96. 1024,768,16,96,120
  97. 1024,768,16,81,100
  98. 1024,768,16,64,80
  99. 1024,768,16,60,75
  100. 1024,768,16,58,72
  101. 1024,768,16,56,70
  102. 1024,768,16,48,60
  103. 1024,768,8,96,120
  104. 1024,768,8,81,100
  105. 1024,768,8,64,80
  106. 1024,768,8,60,75
  107. 1024,768,8,58,72
  108. 1024,768,8,56,70
  109. 1024,768,8,48,60
  110. 800,600,32,75,120
  111. 800,600,32,64,100
  112. 800,600,32,56,90
  113. 800,600,32,46,75
  114. 800,600,32,48,72
  115. 800,600,32,37,60
  116. 800,600,32,35,56
  117. 800,600,24,75,120
  118. 800,600,24,64,100
  119. 800,600,24,56,90
  120. 800,600,24,46,75
  121. 800,600,24,48,72
  122. 800,600,24,37,60
  123. 800,600,24,35,56
  124. 800,600,16,75,120
  125. 800,600,16,64,100
  126. 800,600,16,56,90
  127. 800,600,16,46,75
  128. 800,600,16,48,72
  129. 800,600,16,37,60
  130. 800,600,16,35,56
  131. 800,600,8,75,120
  132. 800,600,8,64,100
  133. 800,600,8,56,90
  134. 800,600,8,46,75
  135. 800,600,8,48,72
  136. 800,600,8,37,60
  137. 800,600,8,35,56
  138. 640,480,32,64,120
  139. 640,480,32,52,100
  140. 640,480,32,48,90
  141. 640,480,32,37,75
  142. 640,480,32,37,72
  143. 640,480,32,31,60
  144. 640,480,24,64,120
  145. 640,480,24,52,100
  146. 640,480,24,48,90
  147. 640,480,24,37,75
  148. 640,480,24,37,72
  149. 640,480,24,31,60
  150. 640,480,16,64,120
  151. 640,480,16,52,100
  152. 640,480,16,48,90
  153. 640,480,16,37,75
  154. 640,480,16,37,72
  155. 640,480,16,31,60
  156. 640,480,8,64,120
  157. 640,480,8,52,100
  158. 640,480,8,48,90
  159. 640,480,8,37,75
  160. 640,480,8,37,72
  161. 640,480,8,31,60
  162.  
  163. [TextMode]
  164. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  165. SHELL, I10, 0x0003,  0x0000
  166. CRT, RUN, REG_LOCK_1, 0x48
  167. CRT, RUN, REG_LOCK_2, 0xA5
  168.  
  169. [GraphicsEnable]
  170. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  171. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  172.  
  173. [GraphicsDisable]
  174. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  175. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  176.  
  177. [2048,1536,8]
  178. # Setting Line Pitch
  179. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  180. CRT,RUN,EXT_MODE,0x00
  181. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  182. # Setting Engine Pitch
  183. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  184. CRT,RUN,MEM_CONFIG,0x8f
  185. # Setting Basic Mode Registers.The registers
  186. # below are neither Desktop or Viewport Regs
  187. # Unlock Sequencer
  188. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  189. # Dump Sequencer Registers
  190. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  191. # Dump Graphics Controller Registers
  192. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  193. # Dump Attribute Controller Registers
  194. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  195. # Lock Sequencer
  196. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  197. DAC_IDR, RUN, DAC_OPERATION, 0x02
  198. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  199. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  200. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  201. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  202. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  203. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  204. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  205. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  206. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  207.  
  208. [2048,768,8]
  209. # Setting Line Pitch
  210. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  211. CRT,RUN,EXT_MODE,0x00
  212. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  213. # Setting Engine Pitch
  214. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  215. CRT,RUN,MEM_CONFIG,0x8f
  216. # Setting Basic Mode Registers.The registers
  217. # below are neither Desktop or Viewport Regs
  218. # Unlock Sequencer
  219. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  220. # Dump Sequencer Registers
  221. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  222. # Dump Graphics Controller Registers
  223. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  224. # Dump Attribute Controller Registers
  225. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  226. # Lock Sequencer
  227. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  228. DAC_IDR, RUN, DAC_OPERATION, 0x02
  229. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  230. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  231. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  232. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  233. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  234. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  235. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  236. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  237. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  238.  
  239. [1024,3072,8]
  240. # Setting Line Pitch
  241. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  242. CRT,RUN,EXT_MODE,0x00
  243. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  244. # Setting Engine Pitch
  245. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  246. CRT,RUN,MEM_CONFIG,0x09
  247. # Setting Basic Mode Registers.The registers
  248. # below are neither Desktop or Viewport Regs
  249. # Unlock Sequencer
  250. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  251. # Dump Sequencer Registers
  252. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  253. # Dump Graphics Controller Registers
  254. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  255. # Dump Attribute Controller Registers
  256. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  257. # Lock Sequencer
  258. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  259. DAC_IDR, RUN, DAC_OPERATION, 0x02
  260. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  261. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  262. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  263. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  264. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  265. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  266. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  267. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  268. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  269.  
  270. [1024,1536,8]
  271. # Setting Line Pitch
  272. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  273. CRT,RUN,EXT_MODE,0x00
  274. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  275. # Setting Engine Pitch
  276. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  277. CRT,RUN,MEM_CONFIG,0x09
  278. # Setting Basic Mode Registers.The registers
  279. # below are neither Desktop or Viewport Regs
  280. # Unlock Sequencer
  281. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  282. # Dump Sequencer Registers
  283. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  284. # Dump Graphics Controller Registers
  285. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  286. # Dump Attribute Controller Registers
  287. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  288. # Lock Sequencer
  289. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  290. DAC_IDR, RUN, DAC_OPERATION, 0x02
  291. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  292. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  293. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  294. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  295. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  296. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  297. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  298. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  299. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  300.  
  301. [1024,1536,16]
  302. # Setting Line Pitch
  303. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  304. CRT,RUN,EXT_MODE,0x00
  305. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  306. # Setting Engine Pitch
  307. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  308. CRT,RUN,MEM_CONFIG,0x89
  309. # Setting Basic Mode Registers.The registers
  310. # below are neither Desktop or Viewport Regs
  311. # Unlock Sequencer
  312. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  313. # Dump Sequencer Registers
  314. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  315. # Dump Graphics Controller Registers
  316. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  317. # Dump Attribute Controller Registers
  318. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  319. # Lock Sequencer
  320. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  321. DAC_IDR, RUN, DAC_OPERATION, 0x02
  322. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  323. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  324. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  325. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  326. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  327. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  328. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  329. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  330. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  331.  
  332. [1600,1200,16]
  333. # Setting Line Pitch
  334. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  335. CRT,RUN,EXT_MODE,0x00
  336. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  337. # Setting Engine Pitch
  338. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x91
  339. CRT,RUN,MEM_CONFIG,0x8b
  340. # Setting Basic Mode Registers.The registers
  341. # below are neither Desktop or Viewport Regs
  342. # Unlock Sequencer
  343. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  344. # Dump Sequencer Registers
  345. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  346. # Dump Graphics Controller Registers
  347. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  348. # Dump Attribute Controller Registers
  349. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  350. # Lock Sequencer
  351. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  352. DAC_IDR, RUN, DAC_OPERATION, 0x02
  353. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  354. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  355. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  356. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  357. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  358. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  359. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  360. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  361. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  362.  
  363. [1600,1200,8]
  364. # Setting Line Pitch
  365. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  366. CRT,RUN,EXT_MODE,0x00
  367. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  368. # Setting Engine Pitch
  369. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  370. CRT,RUN,MEM_CONFIG,0x8b
  371. # Setting Basic Mode Registers.The registers
  372. # below are neither Desktop or Viewport Regs
  373. # Unlock Sequencer
  374. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  375. # Dump Sequencer Registers
  376. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  377. # Dump Graphics Controller Registers
  378. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  379. # Dump Attribute Controller Registers
  380. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  381. # Lock Sequencer
  382. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  383. DAC_IDR, RUN, DAC_OPERATION, 0x02
  384. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  385. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  386. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  387. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  388. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  389. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  390. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  391. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  392. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  393.  
  394. [1280,1024,24]
  395. # Setting Line Pitch
  396. CRT,RUN,LOGICAL_LINE_LENGTH,0xe0
  397. CRT,RUN,EXT_MODE,0x00
  398. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  399. # Setting Engine Pitch
  400. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xe0
  401. CRT,RUN,MEM_CONFIG,0x8b
  402. # Setting Basic Mode Registers.The registers
  403. # below are neither Desktop or Viewport Regs
  404. # Unlock Sequencer
  405. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  406. # Dump Sequencer Registers
  407. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  408. # Dump Graphics Controller Registers
  409. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  410. # Dump Attribute Controller Registers
  411. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  412. # Lock Sequencer
  413. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  414. DAC_IDR, RUN, DAC_OPERATION, 0x02
  415. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  416. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  417. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  418. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  419. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  420. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  421. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  422. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  423. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  424.  
  425. [1280,1024,16]
  426. # Setting Line Pitch
  427. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  428. CRT,RUN,EXT_MODE,0x00
  429. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  430. # Setting Engine Pitch
  431. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xd0
  432. CRT,RUN,MEM_CONFIG,0x8b
  433. # Setting Basic Mode Registers.The registers
  434. # below are neither Desktop or Viewport Regs
  435. # Unlock Sequencer
  436. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  437. # Dump Sequencer Registers
  438. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  439. # Dump Graphics Controller Registers
  440. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  441. # Dump Attribute Controller Registers
  442. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  443. # Lock Sequencer
  444. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  445. DAC_IDR, RUN, DAC_OPERATION, 0x02
  446. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  447. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  448. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  449. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  450. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  451. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  452. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  453. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  454. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  455.  
  456. [1280,1024,8]
  457. # Setting Line Pitch
  458. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  459. CRT,RUN,EXT_MODE,0x00
  460. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  461. # Setting Engine Pitch
  462. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  463. CRT,RUN,MEM_CONFIG,0x0b
  464. # Setting Basic Mode Registers.The registers
  465. # below are neither Desktop or Viewport Regs
  466. # Unlock Sequencer
  467. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  468. # Dump Sequencer Registers
  469. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  470. # Dump Graphics Controller Registers
  471. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  472. # Dump Attribute Controller Registers
  473. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  474. # Lock Sequencer
  475. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  476. DAC_IDR, RUN, DAC_OPERATION, 0x02
  477. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  478. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  479. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  480. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  481. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  482. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  483. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  484. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  485. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  486.  
  487. [1152,864,32]
  488. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  489. CRT,RUN,EXT_MODE,0x00
  490. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  491. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x31
  492. CRT,RUN,MEM_CONFIG,0x89
  493. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  494. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  495. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  496. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  497. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  498. DAC_IDR, RUN, DAC_OPERATION, 0x02
  499. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  500. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  501. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  502. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  503. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  504. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  505. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  506. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  507. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  508.  
  509. [1152,864,24]
  510. # Setting Line Pitch
  511. CRT,RUN,LOGICAL_LINE_LENGTH,0xb0
  512. CRT,RUN,EXT_MODE,0x00
  513. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  514. # Setting Engine Pitch
  515. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x21
  516. CRT,RUN,MEM_CONFIG,0x8b
  517. # Setting Basic Mode Registers.The registers
  518. # below are neither Desktop or Viewport Regs
  519. # Unlock Sequencer
  520. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  521. # Dump Sequencer Registers
  522. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  523. # Dump Graphics Controller Registers
  524. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  525. # Dump Attribute Controller Registers
  526. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  527. # Lock Sequencer
  528. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  529. DAC_IDR, RUN, DAC_OPERATION, 0x02
  530. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  531. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  532. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  533. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  534. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  535. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  536. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  537. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  538. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  539.  
  540. [1152,864,16]
  541. # Setting Line Pitch
  542. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  543. CRT,RUN,EXT_MODE,0x00
  544. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  545. # Setting Engine Pitch
  546. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  547. CRT,RUN,MEM_CONFIG,0x8b
  548. # Setting Basic Mode Registers.The registers
  549. # below are neither Desktop or Viewport Regs
  550. # Unlock Sequencer
  551. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  552. # Dump Sequencer Registers
  553. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  554. # Dump Graphics Controller Registers
  555. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  556. # Dump Attribute Controller Registers
  557. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  558. # Lock Sequencer
  559. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  560. DAC_IDR, RUN, DAC_OPERATION, 0x02
  561. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  562. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  563. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  564. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  565. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  566. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  567. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  568. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  569. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  570.  
  571. [1152,864,8]
  572. # Setting Line Pitch
  573. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  574. CRT,RUN,EXT_MODE,0x00
  575. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  576. # Setting Engine Pitch
  577. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  578. CRT,RUN,MEM_CONFIG,0x89
  579. # Setting Basic Mode Registers.The registers
  580. # below are neither Desktop or Viewport Regs
  581. # Unlock Sequencer
  582. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  583. # Dump Sequencer Registers
  584. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  585. # Dump Graphics Controller Registers
  586. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  587. # Dump Attribute Controller Registers
  588. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  589. # Lock Sequencer
  590. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  591. DAC_IDR, RUN, DAC_OPERATION, 0x02
  592. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  593. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  594. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  595. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  596. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  597. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  598. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  599. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  600. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  601.  
  602. [1024,768,32]
  603. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  604. CRT,RUN,EXT_MODE,0x00
  605. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  606. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x30
  607. CRT,RUN,MEM_CONFIG,0x89
  608. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  609. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  610. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  611. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  612. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  613. DAC_IDR, RUN, DAC_OPERATION, 0x02
  614. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  615. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  616. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  617. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  618. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  619. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  620. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  621. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  622. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  623.  
  624. [1024,768,24]
  625. # Setting Line Pitch
  626. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  627. CRT,RUN,EXT_MODE,0x00
  628. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  629. # Setting Engine Pitch
  630. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x20
  631. CRT,RUN,MEM_CONFIG,0x89
  632. # Setting Basic Mode Registers.The registers
  633. # below are neither Desktop or Viewport Regs
  634. # Unlock Sequencer
  635. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  636. # Dump Sequencer Registers
  637. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  638. # Dump Graphics Controller Registers
  639. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  640. # Dump Attribute Controller Registers
  641. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  642. # Lock Sequencer
  643. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  644. DAC_IDR, RUN, DAC_OPERATION, 0x02
  645. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  646. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  647. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  648. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  649. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  650. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  651. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  652. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  653. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  654.  
  655. [1024,768,16]
  656. # Setting Line Pitch
  657. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  658. CRT,RUN,EXT_MODE,0x00
  659. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  660. # Setting Engine Pitch
  661. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  662. CRT,RUN,MEM_CONFIG,0x89
  663. # Setting Basic Mode Registers.The registers
  664. # below are neither Desktop or Viewport Regs
  665. # Unlock Sequencer
  666. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  667. # Dump Sequencer Registers
  668. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  669. # Dump Graphics Controller Registers
  670. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  671. # Dump Attribute Controller Registers
  672. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  673. # Lock Sequencer
  674. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  675. DAC_IDR, RUN, DAC_OPERATION, 0x02
  676. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  677. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  678. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  679. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  680. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  681. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  682. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  683. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  684. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  685.  
  686. [1024,768,8]
  687. # Setting Line Pitch
  688. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  689. CRT,RUN,EXT_MODE,0x00
  690. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  691. # Setting Engine Pitch
  692. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  693. CRT,RUN,MEM_CONFIG,0x09
  694. # Setting Basic Mode Registers.The registers
  695. # below are neither Desktop or Viewport Regs
  696. # Unlock Sequencer
  697. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  698. # Dump Sequencer Registers
  699. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  700. # Dump Graphics Controller Registers
  701. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  702. # Dump Attribute Controller Registers
  703. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  704. # Lock Sequencer
  705. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  706. DAC_IDR, RUN, DAC_OPERATION, 0x02
  707. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  708. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  709. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  710. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  711. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  712. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  713. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  714. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  715. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  716.  
  717. [800,600,32]
  718. # Setting Line Pitch
  719. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  720. CRT,RUN,EXT_MODE,0x00
  721. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  722. # Setting Engine Pitch
  723. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  724. CRT,RUN,MEM_CONFIG,0x8b
  725. # Setting Basic Mode Registers.The registers
  726. # below are neither Desktop or Viewport Regs
  727. # Unlock Sequencer
  728. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  729. # Dump Sequencer Registers
  730. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  731. # Dump Graphics Controller Registers
  732. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  733. # Dump Attribute Controller Registers
  734. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  735. # Lock Sequencer
  736. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  737. DAC_IDR, RUN, DAC_OPERATION, 0x02
  738. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  739. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  740. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  741. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  742. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  743. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  744. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  745. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  746. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  747.  
  748. [800,600,24]
  749. # Setting Line Pitch
  750. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  751. CRT,RUN,EXT_MODE,0x00
  752. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  753. # Setting Engine Pitch
  754. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  755. CRT,RUN,MEM_CONFIG,0x8b
  756. # Setting Basic Mode Registers.The registers
  757. # below are neither Desktop or Viewport Regs
  758. # Unlock Sequencer
  759. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  760. # Dump Sequencer Registers
  761. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  762. # Dump Graphics Controller Registers
  763. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  764. # Dump Attribute Controller Registers
  765. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  766. # Lock Sequencer
  767. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  768. DAC_IDR, RUN, DAC_OPERATION, 0x02
  769. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  770. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  771. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  772. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  773. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  774. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  775. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  776. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  777. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  778.  
  779. [800,600,16]
  780. # Setting Line Pitch
  781. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  782. CRT,RUN,EXT_MODE,0x00
  783. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  784. # Setting Engine Pitch
  785. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  786. CRT,RUN,MEM_CONFIG,0x8b
  787. # Setting Basic Mode Registers.The registers
  788. # below are neither Desktop or Viewport Regs
  789. # Unlock Sequencer
  790. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  791. # Dump Sequencer Registers
  792. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  793. # Dump Graphics Controller Registers
  794. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  795. # Dump Attribute Controller Registers
  796. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  797. # Lock Sequencer
  798. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  799. DAC_IDR, RUN, DAC_OPERATION, 0x02
  800. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  801. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  802. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  803. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  804. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  805. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  806. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  807. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  808. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  809.  
  810. [800,600,8]
  811. # Setting Line Pitch
  812. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  813. CRT,RUN,EXT_MODE,0x00
  814. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  815. # Setting Engine Pitch
  816. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  817. CRT,RUN,MEM_CONFIG,0x8b
  818. # Setting Basic Mode Registers.The registers
  819. # below are neither Desktop or Viewport Regs
  820. # Unlock Sequencer
  821. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  822. # Dump Sequencer Registers
  823. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  824. # Dump Graphics Controller Registers
  825. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  826. # Dump Attribute Controller Registers
  827. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  828. # Lock Sequencer
  829. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  830. DAC_IDR, RUN, DAC_OPERATION, 0x02
  831. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  832. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  833. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  834. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  835. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  836. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  837. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  838. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  839. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  840.  
  841. [640,480,32]
  842. # Setting Line Pitch
  843. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  844. CRT,RUN,EXT_MODE,0x00
  845. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  846. # Setting Engine Pitch
  847. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  848. CRT,RUN,MEM_CONFIG,0x8b
  849. # Setting Basic Mode Registers.The registers
  850. # below are neither Desktop or Viewport Regs
  851. # Unlock Sequencer
  852. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  853. # Dump Sequencer Registers
  854. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  855. # Dump Graphics Controller Registers
  856. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  857. # Dump Attribute Controller Registers
  858. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  859. # Lock Sequencer
  860. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  861. DAC_IDR, RUN, DAC_OPERATION, 0x02
  862. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  863. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  864. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  865. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  866. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  867. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  868. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  869. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  870. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  871.  
  872. [640,480,24]
  873. # Setting Line Pitch
  874. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  875. CRT,RUN,EXT_MODE,0x00
  876. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  877. # Setting Engine Pitch
  878. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  879. CRT,RUN,MEM_CONFIG,0x8b
  880. # Setting Basic Mode Registers.The registers
  881. # below are neither Desktop or Viewport Regs
  882. # Unlock Sequencer
  883. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  884. # Dump Sequencer Registers
  885. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  886. # Dump Graphics Controller Registers
  887. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  888. # Dump Attribute Controller Registers
  889. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  890. # Lock Sequencer
  891. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  892. DAC_IDR, RUN, DAC_OPERATION, 0x02
  893. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  894. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  895. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  896. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  897. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  898. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  899. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  900. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  901. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  902.  
  903. [640,480,16]
  904. # Setting Line Pitch
  905. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  906. CRT,RUN,EXT_MODE,0x00
  907. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  908. # Setting Engine Pitch
  909. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  910. CRT,RUN,MEM_CONFIG,0x8b
  911. # Setting Basic Mode Registers.The registers
  912. # below are neither Desktop or Viewport Regs
  913. # Unlock Sequencer
  914. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  915. # Dump Sequencer Registers
  916. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  917. # Dump Graphics Controller Registers
  918. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  919. # Dump Attribute Controller Registers
  920. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  921. # Lock Sequencer
  922. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  923. DAC_IDR, RUN, DAC_OPERATION, 0x02
  924. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  925. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  926. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  927. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  928. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  929. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  930. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  931. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  932. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  933.  
  934. [640,480,8]
  935. # Setting Line Pitch
  936. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  937. CRT,RUN,EXT_MODE,0x00
  938. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  939. # Setting Engine Pitch
  940. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  941. CRT,RUN,MEM_CONFIG,0x8b
  942. # Setting Basic Mode Registers.The registers
  943. # below are neither Desktop or Viewport Regs
  944. # Unlock Sequencer
  945. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  946. # Dump Sequencer Registers
  947. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  948. # Dump Graphics Controller Registers
  949. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  950. # Dump Attribute Controller Registers
  951. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  952. # Lock Sequencer
  953. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  954. DAC_IDR, RUN, DAC_OPERATION, 0x02
  955. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  956. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  957. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  958. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  959. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  960. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  961. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  962. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  963. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  964.  
  965. [1600,1200,16,95,76]
  966. # Unlock CRTC
  967. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  968. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  969. CRT,RUN,REG_LOCK_1,0x48,0xa5
  970. # Dump CRT Controller Registers
  971. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x10,0xe0,0x00,0x00,0x40
  972. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  973. CRT,RUN,VERT_RETRACE_START,0xb2,0x07,0xaf
  974. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  975. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  976. CRT,RUN,MISC_1,0x15,0x79,0x14,0x11
  977. CRT,RUN,MODE_CONTROL,0x02
  978. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  979. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  980. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  981. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  982. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  983. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  984. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  985. # Lock CRTC Reg 11 for compatibility
  986. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  987. # Dump ENG Register
  988. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  989. # Dump MISCOUT Register
  990. DIR,RUN,MISC_WRITE,0xef
  991. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  992. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  993. CLK_IND, RUN, FREQ_2, 0xe0
  994. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  995. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  996. CRT,RUN,LATCH_DATA, 0x00
  997.  
  998. [1600,1200,16,94,75]
  999. # Unlock CRTC
  1000. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1001. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1002. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1003. # Dump CRT Controller Registers
  1004. CRT,RUN,HORZ_TOTAL,0x82,0x64,0x62,0x05,0x68,0x14,0xe0,0x00,0x00,0x40
  1005. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1006. CRT,RUN,VERT_RETRACE_START,0xb0,0x03,0xaf
  1007. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1008. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1009. CRT,RUN,MISC_1,0x15,0x7d,0x14,0x11
  1010. CRT,RUN,MODE_CONTROL,0x02
  1011. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1012. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1013. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1014. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1015. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1016. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1017. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  1018. # Lock CRTC Reg 11 for compatibility
  1019. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1020. # Dump ENG Register
  1021. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1022. # Dump MISCOUT Register
  1023. DIR,RUN,MISC_WRITE,0xef
  1024. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1025. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1026. CLK_IND, RUN, FREQ_2, 0xe2
  1027. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1028. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1029. CRT,RUN,LATCH_DATA, 0x00
  1030.  
  1031. [1600,1200,16,82,66]
  1032. # Unlock CRTC
  1033. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1034. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1035. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1036. # Dump CRT Controller Registers
  1037. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  1038. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1039. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1040. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1041. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1042. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  1043. CRT,RUN,MODE_CONTROL,0x02
  1044. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1045. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1046. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1047. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1048. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1049. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1050. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  1051. # Lock CRTC Reg 11 for compatibility
  1052. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1053. # Dump ENG Register
  1054. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1055. # Dump MISCOUT Register
  1056. DIR,RUN,MISC_WRITE,0xef
  1057. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1058. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1059. CLK_IND, RUN, FREQ_2, 0xd3
  1060. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1061. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1062. CRT,RUN,LATCH_DATA, 0x00
  1063.  
  1064. [1600,1200,16,75,60]
  1065. # Unlock CRTC
  1066. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1067. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1068. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1069. # Dump CRT Controller Registers
  1070. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  1071. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1072. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1073. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1074. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1075. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1076. CRT,RUN,MODE_CONTROL,0x02
  1077. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1078. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1079. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1080. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1081. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1082. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1083. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  1084. # Lock CRTC Reg 11 for compatibility
  1085. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1086. # Dump ENG Register
  1087. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1088. # Dump MISCOUT Register
  1089. DIR,RUN,MISC_WRITE,0xef
  1090. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1091. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1092. CLK_IND, RUN, FREQ_2, 0xcd
  1093. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1094. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1095. CRT,RUN,LATCH_DATA, 0x00
  1096.  
  1097. [1600,1200,8,95,76]
  1098. # Unlock CRTC
  1099. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1100. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1101. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1102. # Dump CRT Controller Registers
  1103. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x10,0xe0,0x00,0x00,0x40
  1104. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1105. CRT,RUN,VERT_RETRACE_START,0xb2,0x07,0xaf
  1106. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1107. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1108. CRT,RUN,MISC_1,0x15,0x79,0x14,0x11
  1109. CRT,RUN,MODE_CONTROL,0x02
  1110. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1111. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1112. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1113. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1114. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1115. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1116. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1117. # Lock CRTC Reg 11 for compatibility
  1118. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1119. # Dump ENG Register
  1120. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1121. # Dump MISCOUT Register
  1122. DIR,RUN,MISC_WRITE,0xef
  1123. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1124. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1125. CLK_IND, RUN, FREQ_2, 0xe0
  1126. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1127. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1128. CRT,RUN,LATCH_DATA, 0x08
  1129.  
  1130. [1600,1200,8,94,75]
  1131. # Unlock CRTC
  1132. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1133. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1134. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1135. # Dump CRT Controller Registers
  1136. CRT,RUN,HORZ_TOTAL,0x82,0x64,0x62,0x05,0x68,0x14,0xe0,0x00,0x00,0x40
  1137. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1138. CRT,RUN,VERT_RETRACE_START,0xb0,0x03,0xaf
  1139. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1140. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1141. CRT,RUN,MISC_1,0x15,0x7d,0x14,0x11
  1142. CRT,RUN,MODE_CONTROL,0x02
  1143. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1144. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1145. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1146. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1147. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1148. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1149. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1150. # Lock CRTC Reg 11 for compatibility
  1151. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1152. # Dump ENG Register
  1153. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1154. # Dump MISCOUT Register
  1155. DIR,RUN,MISC_WRITE,0xef
  1156. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1157. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1158. CLK_IND, RUN, FREQ_2, 0xe2
  1159. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1160. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1161. CRT,RUN,LATCH_DATA, 0x08
  1162.  
  1163. [1600,1200,8,82,66]
  1164. # Unlock CRTC
  1165. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1166. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1167. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1168. # Dump CRT Controller Registers
  1169. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  1170. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1171. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1172. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1173. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1174. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  1175. CRT,RUN,MODE_CONTROL,0x02
  1176. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1177. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1178. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1179. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1180. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1181. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1182. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1183. # Lock CRTC Reg 11 for compatibility
  1184. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1185. # Dump ENG Register
  1186. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1187. # Dump MISCOUT Register
  1188. DIR,RUN,MISC_WRITE,0xef
  1189. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1190. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1191. CLK_IND, RUN, FREQ_2, 0xd3
  1192. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1193. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1194. CRT,RUN,LATCH_DATA, 0x08
  1195.  
  1196. [1600,1200,8,75,60]
  1197. # Unlock CRTC
  1198. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1199. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1200. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1201. # Dump CRT Controller Registers
  1202. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  1203. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1204. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1205. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1206. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1207. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1208. CRT,RUN,MODE_CONTROL,0x02
  1209. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1210. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1211. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1212. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1213. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1214. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1215. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1216. # Lock CRTC Reg 11 for compatibility
  1217. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1218. # Dump ENG Register
  1219. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1220. # Dump MISCOUT Register
  1221. DIR,RUN,MISC_WRITE,0xef
  1222. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1223. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1224. CLK_IND, RUN, FREQ_2, 0xcd
  1225. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1226. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1227. CRT,RUN,LATCH_DATA, 0x08
  1228.  
  1229. [1280,1024,24,79,75]
  1230. # Unlock CRTC
  1231. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1232. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1233. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1234. # Dump CRT Controller Registers
  1235. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7e,0x06,0x29,0x42,0x00,0x40
  1236. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1237. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1238. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x03,0xe3,0xff
  1239. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1240. CRT,RUN,MISC_1,0x15,0x94,0x28,0x11
  1241. CRT,RUN,MODE_CONTROL,0x02
  1242. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1243. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1244. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1245. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1246. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1247. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1248. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1249. # Lock CRTC Reg 11 for compatibility
  1250. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1251. # Dump ENG Register
  1252. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1253. # Dump MISCOUT Register
  1254. DIR,RUN,MISC_WRITE,0xef
  1255. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1256. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1257. CLK_IND, RUN, FREQ_2, 0xc1
  1258. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1259. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1260. CRT,RUN,LATCH_DATA, 0x00
  1261.  
  1262. [1280,1024,24,76,72]
  1263. # Unlock CRTC
  1264. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1265. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1266. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1267. # Dump CRT Controller Registers
  1268. CRT,RUN,HORZ_TOTAL,0xa0,0x77,0x78,0x84,0x7f,0x07,0x2c,0x42,0x00,0x40
  1269. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1270. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1271. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x06,0xe3,0xff
  1272. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1273. CRT,RUN,MISC_1,0x15,0x9a,0x28,0x11
  1274. CRT,RUN,MODE_CONTROL,0x02
  1275. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1276. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1277. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1278. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1279. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1280. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1281. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1282. # Lock CRTC Reg 11 for compatibility
  1283. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1284. # Dump ENG Register
  1285. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1286. # Dump MISCOUT Register
  1287. DIR,RUN,MISC_WRITE,0xef
  1288. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1289. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1290. CLK_IND, RUN, FREQ_2, 0xc1
  1291. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1292. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1293. CRT,RUN,LATCH_DATA, 0x00
  1294.  
  1295. [1280,1024,24,64,60]
  1296. # Unlock CRTC
  1297. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1298. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1299. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1300. # Dump CRT Controller Registers
  1301. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7d,0x05,0x34,0x42,0x00,0x40
  1302. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1303. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1304. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1305. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1306. CRT,RUN,MISC_1,0x15,0x95,0x28,0x11
  1307. CRT,RUN,MODE_CONTROL,0x02
  1308. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1309. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1310. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1311. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1312. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1313. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1314. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1315. # Lock CRTC Reg 11 for compatibility
  1316. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1317. # Dump ENG Register
  1318. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1319. # Dump MISCOUT Register
  1320. DIR,RUN,MISC_WRITE,0xef
  1321. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1322. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1323. CLK_IND, RUN, FREQ_2, 0xab
  1324. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1325. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1326. CRT,RUN,LATCH_DATA, 0x00
  1327.  
  1328. [1280,1024,16,95,90]
  1329. # Unlock CRTC
  1330. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1331. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1332. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1333. # Dump CRT Controller Registers
  1334. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  1335. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1336. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1337. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1338. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1339. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1340. CRT,RUN,MODE_CONTROL,0x02
  1341. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1342. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1343. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1344. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1345. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1346. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1347. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1348. # Lock CRTC Reg 11 for compatibility
  1349. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1350. # Dump ENG Register
  1351. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1352. # Dump MISCOUT Register
  1353. DIR,RUN,MISC_WRITE,0xef
  1354. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1355. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1356. CLK_IND, RUN, FREQ_2, 0xd0
  1357. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1358. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1359. CRT,RUN,LATCH_DATA, 0x00
  1360.  
  1361. [1280,1024,16,79,75]
  1362. # Unlock CRTC
  1363. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1364. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1365. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1366. # Dump CRT Controller Registers
  1367. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  1368. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1369. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1370. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1371. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1372. CRT,RUN,MISC_1,0x15,0x5e,0x33,0x11
  1373. CRT,RUN,MODE_CONTROL,0x02
  1374. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1375. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1376. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1377. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1378. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1379. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1380. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1381. # Lock CRTC Reg 11 for compatibility
  1382. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1383. # Dump ENG Register
  1384. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1385. # Dump MISCOUT Register
  1386. DIR,RUN,MISC_WRITE,0xef
  1387. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1388. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1389. CLK_IND, RUN, FREQ_2, 0xc1
  1390. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1391. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1392. CRT,RUN,LATCH_DATA, 0x00
  1393.  
  1394. [1280,1024,16,76,72]
  1395. # Unlock CRTC
  1396. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1397. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1398. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1399. # Dump CRT Controller Registers
  1400. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  1401. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1402. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1403. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1404. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1405. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1406. CRT,RUN,MODE_CONTROL,0x02
  1407. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1408. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1409. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1410. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1411. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1412. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1413. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1414. # Lock CRTC Reg 11 for compatibility
  1415. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1416. # Dump ENG Register
  1417. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1418. # Dump MISCOUT Register
  1419. DIR,RUN,MISC_WRITE,0xef
  1420. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1421. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1422. CLK_IND, RUN, FREQ_2, 0xc1
  1423. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1424. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1425. CRT,RUN,LATCH_DATA, 0x00
  1426.  
  1427. [1280,1024,16,64,60]
  1428. # Unlock CRTC
  1429. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1430. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1431. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1432. # Dump CRT Controller Registers
  1433. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  1434. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1435. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1436. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1437. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1438. CRT,RUN,MISC_1,0x15,0x5f,0x33,0x11
  1439. CRT,RUN,MODE_CONTROL,0x02
  1440. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1441. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1442. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1443. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1444. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1445. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1446. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1447. # Lock CRTC Reg 11 for compatibility
  1448. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1449. # Dump ENG Register
  1450. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1451. # Dump MISCOUT Register
  1452. DIR,RUN,MISC_WRITE,0xef
  1453. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1454. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1455. CLK_IND, RUN, FREQ_2, 0xab
  1456. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1457. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1458. CRT,RUN,LATCH_DATA, 0x00
  1459.  
  1460. [1280,1024,8,95,90]
  1461. # Unlock CRTC
  1462. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1463. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1464. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1465. # Dump CRT Controller Registers
  1466. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  1467. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1468. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1469. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1470. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1471. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1472. CRT,RUN,MODE_CONTROL,0x02
  1473. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1474. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1475. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1476. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1477. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1478. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1479. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1480. # Lock CRTC Reg 11 for compatibility
  1481. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1482. # Dump ENG Register
  1483. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1484. # Dump MISCOUT Register
  1485. DIR,RUN,MISC_WRITE,0xef
  1486. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1487. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1488. CLK_IND, RUN, FREQ_2, 0xd0
  1489. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1490. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1491. CRT,RUN,LATCH_DATA, 0x08
  1492.  
  1493. [1280,1024,8,79,75]
  1494. # Unlock CRTC
  1495. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1496. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1497. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1498. # Dump CRT Controller Registers
  1499. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  1500. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1501. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1502. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1503. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1504. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  1505. CRT,RUN,MODE_CONTROL,0x02
  1506. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1507. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1508. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1509. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1510. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1511. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1512. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1513. # Lock CRTC Reg 11 for compatibility
  1514. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1515. # Dump ENG Register
  1516. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1517. # Dump MISCOUT Register
  1518. DIR,RUN,MISC_WRITE,0xef
  1519. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1520. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1521. CLK_IND, RUN, FREQ_2, 0xc1
  1522. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1523. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1524. CRT,RUN,LATCH_DATA, 0x08
  1525.  
  1526. [1280,1024,8,76,72]
  1527. # Unlock CRTC
  1528. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1529. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1530. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1531. # Dump CRT Controller Registers
  1532. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  1533. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1534. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1535. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1536. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1537. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1538. CRT,RUN,MODE_CONTROL,0x02
  1539. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1540. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1541. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1542. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1543. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1544. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1545. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1546. # Lock CRTC Reg 11 for compatibility
  1547. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1548. # Dump ENG Register
  1549. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1550. # Dump MISCOUT Register
  1551. DIR,RUN,MISC_WRITE,0xef
  1552. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1553. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1554. CLK_IND, RUN, FREQ_2, 0xc1
  1555. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1556. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1557. CRT,RUN,LATCH_DATA, 0x08
  1558.  
  1559. [1280,1024,8,64,60]
  1560. # Unlock CRTC
  1561. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1562. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1563. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1564. # Dump CRT Controller Registers
  1565. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  1566. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1567. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1568. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1569. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1570. CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  1571. CRT,RUN,MODE_CONTROL,0x02
  1572. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1573. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1574. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1575. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1576. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1577. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1578. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1579. # Lock CRTC Reg 11 for compatibility
  1580. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1581. # Dump ENG Register
  1582. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1583. # Dump MISCOUT Register
  1584. DIR,RUN,MISC_WRITE,0xef
  1585. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1586. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1587. CLK_IND, RUN, FREQ_2, 0xab
  1588. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1589. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1590. CRT,RUN,LATCH_DATA, 0x08
  1591.  
  1592. [1152,864,32,64,70]
  1593. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1594. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1595. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1596. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1597. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1598. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1599. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1600. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1601. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1602. CRT,RUN,MODE_CONTROL,0x02
  1603. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1604. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1605. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1606. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1607. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1608. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1609. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1610. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1611. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1612. DIR,RUN,MISC_WRITE,0x2f
  1613. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1614. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1615. CLK_IND, RUN, FREQ_2, 0x9b
  1616. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1617. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1618. CRT,RUN,LATCH_DATA, 0x00
  1619.  
  1620. [1152,864,32,56,60]
  1621. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1622. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1623. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1624. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1625. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1626. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1627. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1628. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1629. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1630. CRT,RUN,MODE_CONTROL,0x02
  1631. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1632. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1633. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1634. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1635. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1636. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1637. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1638. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1639. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1640. DIR,RUN,MISC_WRITE,0x2f
  1641. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1642. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1643. CLK_IND, RUN, FREQ_2, 0x90
  1644. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1645. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1646. CRT,RUN,LATCH_DATA, 0x00
  1647.  
  1648. [1152,864,24,64,70]
  1649. # Unlock CRTC
  1650. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1651. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1652. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1653. # Dump CRT Controller Registers
  1654. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6f,0x16,0x92,0xff,0x00,0x60
  1655. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1656. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1657. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x7d,0xeb,0xff
  1658. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1659. CRT,RUN,MISC_1,0x15,0x7f,0x9f,0x11
  1660. CRT,RUN,MODE_CONTROL,0x02
  1661. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1662. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1663. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1664. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1665. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1666. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1667. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1668. # Lock CRTC Reg 11 for compatibility
  1669. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1670. # Dump ENG Register
  1671. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1672. # Dump MISCOUT Register
  1673. DIR,RUN,MISC_WRITE,0xef
  1674. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1675. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1676. CLK_IND, RUN, FREQ_2, 0x9b
  1677. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1678. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1679. CRT,RUN,LATCH_DATA, 0x00
  1680.  
  1681. [1152,864,24,56,60]
  1682. # Unlock CRTC
  1683. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1684. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1685. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1686. # Dump CRT Controller Registers
  1687. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6f,0x15,0xac,0xff,0x00,0x60
  1688. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1689. CRT,RUN,VERT_RETRACE_START,0x77,0x00,0x5f
  1690. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x99,0xeb,0xff
  1691. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  1692. CRT,RUN,MISC_1,0x15,0x7f,0x3d,0x11
  1693. CRT,RUN,MODE_CONTROL,0x02
  1694. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1695. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1696. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1697. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1698. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1699. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1700. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1701. # Lock CRTC Reg 11 for compatibility
  1702. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1703. # Dump ENG Register
  1704. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1705. # Dump MISCOUT Register
  1706. DIR,RUN,MISC_WRITE,0xef
  1707. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1708. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1709. CLK_IND, RUN, FREQ_2, 0x90
  1710. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1711. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1712. CRT,RUN,LATCH_DATA, 0x00
  1713.  
  1714. [1152,864,16,82,90]
  1715. # Unlock CRTC
  1716. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1717. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1718. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1719. # Dump CRT Controller Registers
  1720. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1721. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1722. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1723. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1724. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1725. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1726. CRT,RUN,MODE_CONTROL,0x02
  1727. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1728. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1729. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1730. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1731. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1732. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1733. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1734. # Lock CRTC Reg 11 for compatibility
  1735. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1736. # Dump ENG Register
  1737. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1738. # Dump MISCOUT Register
  1739. DIR,RUN,MISC_WRITE,0xef
  1740. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1741. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1742. CLK_IND, RUN, FREQ_2, 0xb9
  1743. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1744. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1745. CRT,RUN,LATCH_DATA, 0x00
  1746.  
  1747. [1152,864,16,71,75]
  1748. # Unlock CRTC
  1749. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1750. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1751. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1752. # Dump CRT Controller Registers
  1753. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1754. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1755. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1756. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1757. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1758. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1759. CRT,RUN,MODE_CONTROL,0x02
  1760. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1761. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1762. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1763. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1764. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1765. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1766. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1767. # Lock CRTC Reg 11 for compatibility
  1768. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1769. # Dump ENG Register
  1770. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1771. # Dump MISCOUT Register
  1772. DIR,RUN,MISC_WRITE,0xef
  1773. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1774. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1775. CLK_IND, RUN, FREQ_2, 0xa9
  1776. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1777. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1778. CRT,RUN,LATCH_DATA, 0x00
  1779.  
  1780. [1152,864,16,64,70]
  1781. # Unlock CRTC
  1782. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1783. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1784. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1785. # Dump CRT Controller Registers
  1786. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1787. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1788. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1789. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1790. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1791. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1792. CRT,RUN,MODE_CONTROL,0x02
  1793. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1794. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1795. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1796. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1797. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1798. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1799. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1800. # Lock CRTC Reg 11 for compatibility
  1801. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1802. # Dump ENG Register
  1803. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1804. # Dump MISCOUT Register
  1805. DIR,RUN,MISC_WRITE,0xef
  1806. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1807. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1808. CLK_IND, RUN, FREQ_2, 0x9b
  1809. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1810. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1811. CRT,RUN,LATCH_DATA, 0x00
  1812.  
  1813. [1152,864,16,56,60]
  1814. # Unlock CRTC
  1815. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1816. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1817. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1818. # Dump CRT Controller Registers
  1819. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1820. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1821. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1822. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1823. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1824. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1825. CRT,RUN,MODE_CONTROL,0x02
  1826. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1827. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1828. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1829. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1830. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1831. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1832. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1833. # Lock CRTC Reg 11 for compatibility
  1834. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1835. # Dump ENG Register
  1836. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1837. # Dump MISCOUT Register
  1838. DIR,RUN,MISC_WRITE,0xef
  1839. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1840. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1841. CLK_IND, RUN, FREQ_2, 0x90
  1842. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1843. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1844. CRT,RUN,LATCH_DATA, 0x00
  1845.  
  1846. [1152,864,8,82,90]
  1847. # Unlock CRTC
  1848. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1849. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1850. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1851. # Dump CRT Controller Registers
  1852. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1853. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1854. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1855. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1856. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1857. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1858. CRT,RUN,MODE_CONTROL,0x02
  1859. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1860. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1861. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1862. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1863. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1864. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1865. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1866. # Lock CRTC Reg 11 for compatibility
  1867. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1868. # Dump ENG Register
  1869. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1870. # Dump MISCOUT Register
  1871. DIR,RUN,MISC_WRITE,0xef
  1872. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1873. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1874. CLK_IND, RUN, FREQ_2, 0xb9
  1875. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1876. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1877. CRT,RUN,LATCH_DATA, 0x08
  1878.  
  1879. [1152,864,8,71,75]
  1880. # Unlock CRTC
  1881. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1882. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1883. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1884. # Dump CRT Controller Registers
  1885. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1886. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1887. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1888. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1889. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1890. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1891. CRT,RUN,MODE_CONTROL,0x02
  1892. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1893. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1894. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1895. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1896. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1897. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1898. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1899. # Lock CRTC Reg 11 for compatibility
  1900. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1901. # Dump ENG Register
  1902. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1903. # Dump MISCOUT Register
  1904. DIR,RUN,MISC_WRITE,0xef
  1905. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1906. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1907. CLK_IND, RUN, FREQ_2, 0xa9
  1908. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1909. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1910. CRT,RUN,LATCH_DATA, 0x08
  1911.  
  1912. [1152,864,8,64,70]
  1913. # Unlock CRTC
  1914. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1915. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1916. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1917. # Dump CRT Controller Registers
  1918. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1919. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1920. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1921. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1922. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1923. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1924. CRT,RUN,MODE_CONTROL,0x02
  1925. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1926. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1927. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1928. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1929. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1930. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1931. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1932. # Lock CRTC Reg 11 for compatibility
  1933. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1934. # Dump ENG Register
  1935. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1936. # Dump MISCOUT Register
  1937. DIR,RUN,MISC_WRITE,0xef
  1938. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1939. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1940. CLK_IND, RUN, FREQ_2, 0x9b
  1941. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1942. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1943. CRT,RUN,LATCH_DATA, 0x08
  1944.  
  1945. [1152,864,8,56,60]
  1946. # Unlock CRTC
  1947. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1948. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1949. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1950. # Dump CRT Controller Registers
  1951. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1952. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1953. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1954. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1955. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1956. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1957. CRT,RUN,MODE_CONTROL,0x02
  1958. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1959. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1960. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1961. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1962. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1963. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1964. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1965. # Lock CRTC Reg 11 for compatibility
  1966. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1967. # Dump ENG Register
  1968. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1969. # Dump MISCOUT Register
  1970. DIR,RUN,MISC_WRITE,0xef
  1971. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1972. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1973. CLK_IND, RUN, FREQ_2, 0x90
  1974. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1975. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1976. CRT,RUN,LATCH_DATA, 0x08
  1977.  
  1978. [1024,768,32,64,80]
  1979. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1980. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1981. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1982. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1983. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1984. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1985. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1986. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1987. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1988. CRT,RUN,MODE_CONTROL,0x02
  1989. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1990. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1991. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1992. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1993. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1994. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1995. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1996. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1997. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1998. DIR,RUN,MISC_WRITE,0x2f
  1999. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2000. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2001. CLK_IND, RUN, FREQ_2, 0x93
  2002. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2003. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2004. CRT,RUN,LATCH_DATA, 0x00
  2005.  
  2006. [1024,768,32,60,75]
  2007. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2008. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2009. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2010. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2011. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2012. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2013. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2014. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2015. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2016. CRT,RUN,MODE_CONTROL,0x02
  2017. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2018. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2019. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2020. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2021. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2022. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2023. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2024. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2025. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2026. DIR,RUN,MISC_WRITE,0x2f
  2027. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2028. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2029. CLK_IND, RUN, FREQ_2, 0x8c
  2030. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2031. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2032. CRT,RUN,LATCH_DATA, 0x00
  2033.  
  2034. [1024,768,32,58,72]
  2035. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2036. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2037. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2038. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2039. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2040. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2041. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2042. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2043. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  2044. CRT,RUN,MODE_CONTROL,0x02
  2045. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2046. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2047. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2048. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2049. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2050. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2051. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2052. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2053. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2054. DIR,RUN,MISC_WRITE,0x2f
  2055. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2056. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2057. CLK_IND, RUN, FREQ_2, 0x88
  2058. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2059. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2060. CRT,RUN,LATCH_DATA, 0x00
  2061.  
  2062. [1024,768,32,56,70]
  2063. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2064. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2065. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2066. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2067. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2068. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2069. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2070. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2071. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2072. CRT,RUN,MODE_CONTROL,0x02
  2073. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2074. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2075. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2076. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2077. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2078. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2079. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2080. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2081. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2082. DIR,RUN,MISC_WRITE,0x2f
  2083. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2084. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2085. CLK_IND, RUN, FREQ_2, 0x88
  2086. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2087. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2088. CRT,RUN,LATCH_DATA, 0x00
  2089.  
  2090. [1024,768,32,48,60]
  2091. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2092. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2093. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2094. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2095. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2096. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2097. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2098. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2099. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  2100. CRT,RUN,MODE_CONTROL,0x02
  2101. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2102. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2103. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2104. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2105. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2106. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2107. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2108. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2109. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2110. DIR,RUN,MISC_WRITE,0x2f
  2111. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2112. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2113. CLK_IND, RUN, FREQ_2, 0x7e
  2114. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2115. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2116. CRT,RUN,LATCH_DATA, 0x00
  2117.  
  2118. [1024,768,24,64,80]
  2119. # Unlock CRTC
  2120. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2121. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2122. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2123. # Dump CRT Controller Registers
  2124. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x65,0x8e,0x1f,0xf5,0x00,0x60
  2125. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2126. CRT,RUN,VERT_RETRACE_START,0x00,0x0e,0xff
  2127. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1b,0xeb,0xff
  2128. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2129. CRT,RUN,MISC_1,0x15,0x70,0x3d,0x11
  2130. CRT,RUN,MODE_CONTROL,0x02
  2131. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2132. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2133. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2134. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2135. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2136. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2137. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2138. # Lock CRTC Reg 11 for compatibility
  2139. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2140. # Dump ENG Register
  2141. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2142. # Dump MISCOUT Register
  2143. DIR,RUN,MISC_WRITE,0xef
  2144. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2145. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2146. CLK_IND, RUN, FREQ_2, 0x93
  2147. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2148. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2149. CRT,RUN,LATCH_DATA, 0x00
  2150.  
  2151. [1024,768,24,60,75]
  2152. # Unlock CRTC
  2153. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2154. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2155. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2156. # Dump CRT Controller Registers
  2157. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x99,0x63,0x90,0x1e,0xf1,0x00,0x60
  2158. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2159. CRT,RUN,VERT_RETRACE_START,0xff,0x05,0xff
  2160. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xeb,0xff
  2161. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2162. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2163. CRT,RUN,MODE_CONTROL,0x02
  2164. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2165. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2166. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2167. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2168. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2169. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2170. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2171. # Lock CRTC Reg 11 for compatibility
  2172. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2173. # Dump ENG Register
  2174. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2175. # Dump MISCOUT Register
  2176. DIR,RUN,MISC_WRITE,0xef
  2177. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2178. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2179. CLK_IND, RUN, FREQ_2, 0x8c
  2180. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2181. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2182. CRT,RUN,LATCH_DATA, 0x00
  2183.  
  2184. [1024,768,24,58,72]
  2185. # Unlock CRTC
  2186. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2187. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2188. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2189. # Dump CRT Controller Registers
  2190. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x9a,0x61,0x8a,0x19,0xf5,0x00,0x60
  2191. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2192. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2193. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x11,0xeb,0xff
  2194. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2195. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2196. CRT,RUN,MODE_CONTROL,0x02
  2197. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2198. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2199. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2200. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2201. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2202. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2203. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2204. # Lock CRTC Reg 11 for compatibility
  2205. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2206. # Dump ENG Register
  2207. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2208. # Dump MISCOUT Register
  2209. DIR,RUN,MISC_WRITE,0xef
  2210. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2211. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2212. CLK_IND, RUN, FREQ_2, 0x88
  2213. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2214. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2215. CRT,RUN,LATCH_DATA, 0x00
  2216.  
  2217. [1024,768,24,56,70]
  2218. # Unlock CRTC
  2219. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2220. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2221. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2222. # Dump CRT Controller Registers
  2223. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x1b,0x62,0x8f,0x2a,0xf5,0x00,0x60
  2224. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2225. CRT,RUN,VERT_RETRACE_START,0x03,0x09,0xff
  2226. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x2a,0xeb,0xff
  2227. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2228. CRT,RUN,MISC_1,0x15,0x71,0x21,0x11
  2229. CRT,RUN,MODE_CONTROL,0x02
  2230. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2231. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2232. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2233. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2234. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2235. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2236. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2237. # Lock CRTC Reg 11 for compatibility
  2238. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2239. # Dump ENG Register
  2240. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2241. # Dump MISCOUT Register
  2242. DIR,RUN,MISC_WRITE,0xef
  2243. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2244. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2245. CLK_IND, RUN, FREQ_2, 0x88
  2246. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2247. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2248. CRT,RUN,LATCH_DATA, 0x00
  2249.  
  2250. [1024,768,24,48,60]
  2251. # Unlock CRTC
  2252. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2253. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2254. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2255. # Dump CRT Controller Registers
  2256. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x62,0x8f,0x24,0xf5,0x00,0x60
  2257. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2258. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2259. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xeb,0xff
  2260. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2261. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2262. CRT,RUN,MODE_CONTROL,0x02
  2263. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2264. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2265. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2266. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2267. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2268. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2269. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2270. # Lock CRTC Reg 11 for compatibility
  2271. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2272. # Dump ENG Register
  2273. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2274. # Dump MISCOUT Register
  2275. DIR,RUN,MISC_WRITE,0xef
  2276. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2277. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2278. CLK_IND, RUN, FREQ_2, 0x7e
  2279. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2280. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2281. CRT,RUN,LATCH_DATA, 0x00
  2282.  
  2283. [1024,768,16,96,120]
  2284. # Unlock CRTC
  2285. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2286. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2287. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2288. # Dump CRT Controller Registers
  2289. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2290. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2291. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2292. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2293. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2294. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2295. CRT,RUN,MODE_CONTROL,0x02
  2296. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2297. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2298. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2299. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2300. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2301. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2302. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2303. # Lock CRTC Reg 11 for compatibility
  2304. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2305. # Dump ENG Register
  2306. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2307. # Dump MISCOUT Register
  2308. DIR,RUN,MISC_WRITE,0xef
  2309. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2310. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2311. CLK_IND, RUN, FREQ_2, 0xbd
  2312. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2313. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2314. CRT,RUN,LATCH_DATA, 0x00
  2315.  
  2316. [1024,768,16,81,100]
  2317. # Unlock CRTC
  2318. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2319. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2320. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2321. # Dump CRT Controller Registers
  2322. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2323. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2324. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2325. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2326. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2327. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2328. CRT,RUN,MODE_CONTROL,0x02
  2329. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2330. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2331. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2332. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2333. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2334. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2335. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2336. # Lock CRTC Reg 11 for compatibility
  2337. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2338. # Dump ENG Register
  2339. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2340. # Dump MISCOUT Register
  2341. DIR,RUN,MISC_WRITE,0xef
  2342. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2343. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2344. CLK_IND, RUN, FREQ_2, 0xa9
  2345. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2346. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2347. CRT,RUN,LATCH_DATA, 0x00
  2348.  
  2349. [1024,768,16,64,80]
  2350. # Unlock CRTC
  2351. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2352. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2353. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2354. # Dump CRT Controller Registers
  2355. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2356. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2357. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2358. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2359. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2360. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2361. CRT,RUN,MODE_CONTROL,0x02
  2362. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2363. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2364. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2365. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2366. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2367. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2368. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2369. # Lock CRTC Reg 11 for compatibility
  2370. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2371. # Dump ENG Register
  2372. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2373. # Dump MISCOUT Register
  2374. DIR,RUN,MISC_WRITE,0xef
  2375. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2376. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2377. CLK_IND, RUN, FREQ_2, 0x93
  2378. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2379. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2380. CRT,RUN,LATCH_DATA, 0x00
  2381.  
  2382. [1024,768,16,60,75]
  2383. # Unlock CRTC
  2384. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2385. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2386. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2387. # Dump CRT Controller Registers
  2388. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2389. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2390. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2391. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2392. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2393. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2394. CRT,RUN,MODE_CONTROL,0x02
  2395. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2396. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2397. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2398. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2399. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2400. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2401. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2402. # Lock CRTC Reg 11 for compatibility
  2403. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2404. # Dump ENG Register
  2405. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2406. # Dump MISCOUT Register
  2407. DIR,RUN,MISC_WRITE,0xef
  2408. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2409. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2410. CLK_IND, RUN, FREQ_2, 0x8c
  2411. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2412. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2413. CRT,RUN,LATCH_DATA, 0x00
  2414.  
  2415. [1024,768,16,58,72]
  2416. # Unlock CRTC
  2417. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2418. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2419. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2420. # Dump CRT Controller Registers
  2421. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2422. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2423. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2424. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2425. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2426. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  2427. CRT,RUN,MODE_CONTROL,0x02
  2428. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2429. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2430. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2431. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2432. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2433. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2434. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2435. # Lock CRTC Reg 11 for compatibility
  2436. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2437. # Dump ENG Register
  2438. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2439. # Dump MISCOUT Register
  2440. DIR,RUN,MISC_WRITE,0xef
  2441. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2442. CLK_IND, RUN, FREQ_2,0x88
  2443. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2444. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2445. CLK_IND, RUN, FREQ_2, 0x88
  2446. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2447. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2448. CRT,RUN,LATCH_DATA, 0x00
  2449.  
  2450. [1024,768,16,56,70]
  2451. # Unlock CRTC
  2452. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2453. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2454. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2455. # Dump CRT Controller Registers
  2456. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2457. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2458. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2459. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2460. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2461. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2462. CRT,RUN,MODE_CONTROL,0x02
  2463. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2464. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2465. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2466. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2467. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2468. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2469. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2470. # Lock CRTC Reg 11 for compatibility
  2471. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2472. # Dump ENG Register
  2473. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2474. # Dump MISCOUT Register
  2475. DIR,RUN,MISC_WRITE,0xef
  2476. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2477. CLK_IND, RUN, FREQ_2,0x88
  2478. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2479. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2480. CLK_IND, RUN, FREQ_2, 0x88
  2481. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2482. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2483. CRT,RUN,LATCH_DATA, 0x00
  2484.  
  2485. [1024,768,16,48,60]
  2486. # Unlock CRTC
  2487. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2488. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2489. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2490. # Dump CRT Controller Registers
  2491. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2492. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2493. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2494. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2495. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2496. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  2497. CRT,RUN,MODE_CONTROL,0x02
  2498. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2499. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2500. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2501. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2502. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2503. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2504. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2505. # Lock CRTC Reg 11 for compatibility
  2506. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2507. # Dump ENG Register
  2508. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2509. # Dump MISCOUT Register
  2510. DIR,RUN,MISC_WRITE,0xef
  2511. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2512. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2513. CLK_IND, RUN, FREQ_2, 0x7E
  2514. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2515. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2516. CRT,RUN,LATCH_DATA, 0x00
  2517.  
  2518. [1024,768,8,96,120]
  2519. # Unlock CRTC
  2520. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2521. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2522. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2523. # Dump CRT Controller Registers
  2524. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2525. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2526. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2527. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2528. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2529. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2530. CRT,RUN,MODE_CONTROL,0x02
  2531. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2532. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2533. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2534. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2535. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2536. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2537. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2538. # Lock CRTC Reg 11 for compatibility
  2539. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2540. # Dump ENG Register
  2541. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2542. # Dump MISCOUT Register
  2543. DIR,RUN,MISC_WRITE,0xef
  2544. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2545. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2546. CLK_IND, RUN, FREQ_2, 0xbd
  2547. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2548. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2549. CRT,RUN,LATCH_DATA, 0x08
  2550.  
  2551. [1024,768,8,81,100]
  2552. # Unlock CRTC
  2553. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2554. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2555. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2556. # Dump CRT Controller Registers
  2557. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2558. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2559. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2560. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2561. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2562. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2563. CRT,RUN,MODE_CONTROL,0x02
  2564. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2565. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2566. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2567. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2568. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2569. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2570. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2571. # Lock CRTC Reg 11 for compatibility
  2572. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2573. # Dump ENG Register
  2574. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2575. # Dump MISCOUT Register
  2576. DIR,RUN,MISC_WRITE,0xef
  2577. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2578. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2579. CLK_IND, RUN, FREQ_2, 0xa9
  2580. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2581. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2582. CRT,RUN,LATCH_DATA, 0x08
  2583.  
  2584. [1024,768,8,64,80]
  2585. # Unlock CRTC
  2586. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2587. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2588. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2589. # Dump CRT Controller Registers
  2590. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2591. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2592. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2593. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2594. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2595. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2596. CRT,RUN,MODE_CONTROL,0x02
  2597. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2598. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2599. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2600. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2601. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2602. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2603. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2604. # Lock CRTC Reg 11 for compatibility
  2605. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2606. # Dump ENG Register
  2607. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2608. # Dump MISCOUT Register
  2609. DIR,RUN,MISC_WRITE,0xef
  2610. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2611. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2612. CLK_IND, RUN, FREQ_2, 0x93
  2613. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2614. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2615. CRT,RUN,LATCH_DATA, 0x08
  2616.  
  2617. [1024,768,8,60,75]
  2618. # Unlock CRTC
  2619. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2620. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2621. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2622. # Dump CRT Controller Registers
  2623. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2624. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2625. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2626. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2627. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2628. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2629. CRT,RUN,MODE_CONTROL,0x02
  2630. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2631. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2632. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2633. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2634. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2635. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2636. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2637. # Lock CRTC Reg 11 for compatibility
  2638. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2639. # Dump ENG Register
  2640. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2641. # Dump MISCOUT Register
  2642. DIR,RUN,MISC_WRITE,0xef
  2643. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2644. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2645. CLK_IND, RUN, FREQ_2, 0x8c
  2646. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2647. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2648. CRT,RUN,LATCH_DATA, 0x08
  2649.  
  2650. [1024,768,8,58,72]
  2651. # Unlock CRTC
  2652. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2653. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2654. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2655. # Dump CRT Controller Registers
  2656. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2657. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2658. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2659. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2660. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2661. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  2662. CRT,RUN,MODE_CONTROL,0x02
  2663. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2664. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2665. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2666. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2667. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2668. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2669. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2670. # Lock CRTC Reg 11 for compatibility
  2671. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2672. # Dump ENG Register
  2673. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2674. # Dump MISCOUT Register
  2675. DIR,RUN,MISC_WRITE,0xef
  2676. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2677. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2678. CLK_IND, RUN, FREQ_2, 0x88
  2679. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2680. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2681. CRT,RUN,LATCH_DATA, 0x08
  2682.  
  2683. [1024,768,8,56,70]
  2684. # Unlock CRTC
  2685. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2686. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2687. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2688. # Dump CRT Controller Registers
  2689. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2690. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2691. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2692. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2693. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2694. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2695. CRT,RUN,MODE_CONTROL,0x02
  2696. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2697. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2698. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2699. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2700. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2701. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2702. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2703. # Lock CRTC Reg 11 for compatibility
  2704. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2705. # Dump ENG Register
  2706. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2707. # Dump MISCOUT Register
  2708. DIR,RUN,MISC_WRITE,0xef
  2709. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2710. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2711. CLK_IND, RUN, FREQ_2, 0x88
  2712. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2713. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2714. CRT,RUN,LATCH_DATA, 0x08
  2715.  
  2716. [1024,768,8,48,60]
  2717. # Unlock CRTC
  2718. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2719. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2720. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2721. # Dump CRT Controller Registers
  2722. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2723. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2724. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2725. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2726. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2727. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  2728. CRT,RUN,MODE_CONTROL,0x02
  2729. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2730. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2731. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2732. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2733. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2734. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2735. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2736. # Lock CRTC Reg 11 for compatibility
  2737. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2738. # Dump ENG Register
  2739. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2740. # Dump MISCOUT Register
  2741. DIR,RUN,MISC_WRITE,0xef
  2742. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2743. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2744. CLK_IND, RUN, FREQ_2, 0x7e
  2745. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2746. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2747. CRT,RUN,LATCH_DATA, 0x08
  2748.  
  2749. [800,600,32,75,120]
  2750. # Unlock CRTC
  2751. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2752. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2753. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2754. # Dump CRT Controller Registers
  2755. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2756. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2757. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2758. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2759. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2760. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2761. CRT,RUN,MODE_CONTROL,0x02
  2762. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2763. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2764. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2765. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2766. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2767. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2768. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2769. # Lock CRTC Reg 11 for compatibility
  2770. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2771. # Dump ENG Register
  2772. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2773. # Dump MISCOUT Register
  2774. DIR,RUN,MISC_WRITE,0xef
  2775. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2776. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2777. CLK_IND, RUN, FREQ_2, 0x8a
  2778. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2779. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2780. CRT,RUN,LATCH_DATA, 0x00
  2781.  
  2782. [800,600,32,64,100]
  2783. # Unlock CRTC
  2784. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2785. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2786. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2787. # Dump CRT Controller Registers
  2788. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2789. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2790. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2791. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2792. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2793. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2794. CRT,RUN,MODE_CONTROL,0x02
  2795. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2796. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2797. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2798. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2799. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2800. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2801. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2802. # Lock CRTC Reg 11 for compatibility
  2803. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2804. # Dump ENG Register
  2805. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2806. # Dump MISCOUT Register
  2807. DIR,RUN,MISC_WRITE,0xef
  2808. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2809. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2810. CLK_IND, RUN, FREQ_2, 0x7e
  2811. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2812. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2813. CRT,RUN,LATCH_DATA, 0x00
  2814.  
  2815. [800,600,32,56,90]
  2816. # Unlock CRTC
  2817. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2818. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2819. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2820. # Dump CRT Controller Registers
  2821. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2822. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2823. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2824. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2825. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2826. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2827. CRT,RUN,MODE_CONTROL,0x02
  2828. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2829. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2830. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2831. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2832. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2833. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2834. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2835. # Lock CRTC Reg 11 for compatibility
  2836. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2837. # Dump ENG Register
  2838. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2839. # Dump MISCOUT Register
  2840. DIR,RUN,MISC_WRITE,0xef
  2841. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2842. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2843. CLK_IND, RUN, FREQ_2, 0x70
  2844. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2845. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2846. CRT,RUN,LATCH_DATA, 0x00
  2847.  
  2848. [800,600,32,46,75]
  2849. # Unlock CRTC
  2850. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2851. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2852. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2853. # Dump CRT Controller Registers
  2854. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2855. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2856. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2857. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2858. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2859. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2860. CRT,RUN,MODE_CONTROL,0x02
  2861. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2862. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2863. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2864. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2865. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2866. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2867. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2868. # Lock CRTC Reg 11 for compatibility
  2869. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2870. # Dump ENG Register
  2871. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2872. # Dump MISCOUT Register
  2873. DIR,RUN,MISC_WRITE,0xef
  2874. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2875. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2876. CLK_IND, RUN, FREQ_2, 0x60
  2877. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2878. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2879. CRT,RUN,LATCH_DATA, 0x00
  2880.  
  2881. [800,600,32,48,72]
  2882. # Unlock CRTC
  2883. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2884. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2885. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2886. # Dump CRT Controller Registers
  2887. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2888. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2889. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2890. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2891. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2892. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2893. CRT,RUN,MODE_CONTROL,0x02
  2894. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2895. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2896. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2897. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2898. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2899. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2900. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2901. # Lock CRTC Reg 11 for compatibility
  2902. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2903. # Dump ENG Register
  2904. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2905. # Dump MISCOUT Register
  2906. DIR,RUN,MISC_WRITE,0xef
  2907. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2908. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2909. CLK_IND, RUN, FREQ_2, 0x61
  2910. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2911. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2912. CRT,RUN,LATCH_DATA, 0x00
  2913.  
  2914. [800,600,32,35,56]
  2915. # Unlock CRTC
  2916. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2917. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2918. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2919. # Dump CRT Controller Registers
  2920. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2921. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2922. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2923. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2924. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2925. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2926. CRT,RUN,MODE_CONTROL,0x02
  2927. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2928. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2929. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2930. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2931. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2932. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2933. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2934. # Lock CRTC Reg 11 for compatibility
  2935. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2936. # Dump ENG Register
  2937. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2938. # Dump MISCOUT Register
  2939. DIR,RUN,MISC_WRITE,0xef
  2940. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2941. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2942. CLK_IND, RUN, FREQ_2, 0x45
  2943. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2944. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2945. CRT,RUN,LATCH_DATA, 0x00
  2946.  
  2947. [800,600,32,37,60]
  2948. # Unlock CRTC
  2949. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2950. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2951. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2952. # Dump CRT Controller Registers
  2953. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2954. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2955. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2956. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2957. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2958. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2959. CRT,RUN,MODE_CONTROL,0x02
  2960. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2961. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2962. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2963. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2964. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2965. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2966. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2967. # Lock CRTC Reg 11 for compatibility
  2968. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2969. # Dump ENG Register
  2970. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2971. # Dump MISCOUT Register
  2972. DIR,RUN,MISC_WRITE,0xef
  2973. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2974. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2975. CLK_IND, RUN, FREQ_2, 0x4D
  2976. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2977. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2978. CRT,RUN,LATCH_DATA, 0x00
  2979.  
  2980. [800,600,24,75,120]
  2981. # Unlock CRTC
  2982. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2983. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2984. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2985. # Dump CRT Controller Registers
  2986. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  2987. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2988. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  2989. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2990. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2991. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2992. CRT,RUN,MODE_CONTROL,0x02
  2993. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2994. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2995. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2996. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2997. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2998. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2999. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3000. # Lock CRTC Reg 11 for compatibility
  3001. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3002. # Dump ENG Register
  3003. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3004. # Dump MISCOUT Register
  3005. DIR,RUN,MISC_WRITE,0xef
  3006. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3007. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3008. CLK_IND, RUN, FREQ_2, 0x8a
  3009. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3010. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3011. CRT,RUN,LATCH_DATA, 0x00
  3012.  
  3013.  
  3014. [800,600,24,64,100]
  3015. # Unlock CRTC
  3016. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3017. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3018. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3019. # Dump CRT Controller Registers
  3020. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x7a,0xf0,0x00,0x60
  3021. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3022. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  3023. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3024. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3025. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3026. CRT,RUN,MODE_CONTROL,0x02
  3027. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3028. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3029. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3030. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3031. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3032. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3033. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3034. # Lock CRTC Reg 11 for compatibility
  3035. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3036. # Dump ENG Register
  3037. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3038. # Dump MISCOUT Register
  3039. DIR,RUN,MISC_WRITE,0xef
  3040. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3041. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3042. CLK_IND, RUN, FREQ_2, 0x7e
  3043. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3044. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3045. CRT,RUN,LATCH_DATA, 0x00
  3046.  
  3047.  
  3048. [800,600,24,56,90]
  3049. # Unlock CRTC
  3050. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3051. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3052. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3053. # Dump CRT Controller Registers
  3054. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x1b,0x6f,0xf0,0x00,0x60
  3055. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3056. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  3057. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3058. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3059. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  3060. CRT,RUN,MODE_CONTROL,0x02
  3061. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3062. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3063. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3064. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3065. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3066. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3067. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3068. # Lock CRTC Reg 11 for compatibility
  3069. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3070. # Dump ENG Register
  3071. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3072. # Dump MISCOUT Register
  3073. DIR,RUN,MISC_WRITE,0xef
  3074. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3075. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3076. CLK_IND, RUN, FREQ_2, 0x70
  3077. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3078. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3079. CRT,RUN,LATCH_DATA, 0x00
  3080.  
  3081.  
  3082. [800,600,24,46,75]
  3083. # Unlock CRTC
  3084. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3085. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3086. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3087. # Dump CRT Controller Registers
  3088. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x52,0x1a,0x6f,0xe0,0x00,0x60
  3089. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3090. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3091. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3092. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3093. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3094. CRT,RUN,MODE_CONTROL,0x02
  3095. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3096. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3097. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3098. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3099. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3100. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3101. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3102. # Lock CRTC Reg 11 for compatibility
  3103. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3104. # Dump ENG Register
  3105. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3106. # Dump MISCOUT Register
  3107. DIR,RUN,MISC_WRITE,0xef
  3108. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3109. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3110. CLK_IND, RUN, FREQ_2, 0x60
  3111. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3112. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3113. CRT,RUN,LATCH_DATA, 0x00
  3114.  
  3115.  
  3116. [800,600,24,48,72]
  3117. # Unlock CRTC
  3118. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3119. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3120. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3121. # Dump CRT Controller Registers
  3122. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x8e,0xf0,0x00,0x60
  3123. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3124. CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  3125. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3126. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3127. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3128. CRT,RUN,MODE_CONTROL,0x02
  3129. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3130. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3131. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3132. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3133. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3134. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3135. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3136. # Lock CRTC Reg 11 for compatibility
  3137. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3138. # Dump ENG Register
  3139. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3140. # Dump MISCOUT Register
  3141. DIR,RUN,MISC_WRITE,0xef
  3142. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3143. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3144. CLK_IND, RUN, FREQ_2, 0x61
  3145. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3146. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3147. CRT,RUN,LATCH_DATA, 0x00
  3148.  
  3149. [800,600,24,37,60]
  3150. # Unlock CRTC
  3151. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3152. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3153. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3154. # Dump CRT Controller Registers
  3155. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x72,0xf0,0x00,0x60
  3156. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3157. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3158. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3159. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3160. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3161. CRT,RUN,MODE_CONTROL,0x02
  3162. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3163. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3164. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3165. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3166. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3167. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3168. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3169. # Lock CRTC Reg 11 for compatibility
  3170. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3171. # Dump ENG Register
  3172. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3173. # Dump MISCOUT Register
  3174. DIR,RUN,MISC_WRITE,0xef
  3175. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3176. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3177. CLK_IND, RUN, FREQ_2, 0x4d
  3178. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3179. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3180. CRT,RUN,LATCH_DATA, 0x00
  3181.  
  3182.  
  3183. [800,600,24,35,56]
  3184. # Unlock CRTC
  3185. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3186. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3187. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3188. # Dump CRT Controller Registers
  3189. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x18,0x72,0xf0,0x00,0x60
  3190. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3191. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3192. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3193. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3194. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3195. CRT,RUN,MODE_CONTROL,0x02
  3196. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3197. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3198. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3199. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3200. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3201. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3202. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3203. # Lock CRTC Reg 11 for compatibility
  3204. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3205. # Dump ENG Register
  3206. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3207. # Dump MISCOUT Register
  3208. DIR,RUN,MISC_WRITE,0xef
  3209. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3210. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3211. CLK_IND, RUN, FREQ_2, 0x45
  3212. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3213. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3214. CRT,RUN,LATCH_DATA, 0x00
  3215.  
  3216.  
  3217.  
  3218. [800,600,16,75,120]
  3219. # Unlock CRTC
  3220. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3221. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3222. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3223. # Dump CRT Controller Registers
  3224. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3225. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3226. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3227. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3228. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3229. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3230. CRT,RUN,MODE_CONTROL,0x02
  3231. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3232. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3233. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3234. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3235. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3236. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3237. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3238. # Lock CRTC Reg 11 for compatibility
  3239. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3240. # Dump ENG Register
  3241. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3242. # Dump MISCOUT Register
  3243. DIR,RUN,MISC_WRITE,0xef
  3244. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3245. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3246. CLK_IND, RUN, FREQ_2, 0x8a
  3247. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3248. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3249. CRT,RUN,LATCH_DATA, 0x00
  3250.  
  3251. [800,600,16,64,100]
  3252. # Unlock CRTC
  3253. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3254. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3255. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3256. # Dump CRT Controller Registers
  3257. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3258. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3259. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3260. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3261. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3262. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3263. CRT,RUN,MODE_CONTROL,0x02
  3264. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3265. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3266. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3267. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3268. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3269. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3270. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3271. # Lock CRTC Reg 11 for compatibility
  3272. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3273. # Dump ENG Register
  3274. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3275. # Dump MISCOUT Register
  3276. DIR,RUN,MISC_WRITE,0xef
  3277. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3278. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3279. CLK_IND, RUN, FREQ_2, 0x7e
  3280. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3281. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3282. CRT,RUN,LATCH_DATA, 0x00
  3283.  
  3284. [800,600,16,56,90]
  3285. # Unlock CRTC
  3286. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3287. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3288. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3289. # Dump CRT Controller Registers
  3290. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3291. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3292. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3293. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3294. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3295. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3296. CRT,RUN,MODE_CONTROL,0x02
  3297. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3298. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3299. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3300. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3301. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3302. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3303. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3304. # Lock CRTC Reg 11 for compatibility
  3305. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3306. # Dump ENG Register
  3307. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3308. # Dump MISCOUT Register
  3309. DIR,RUN,MISC_WRITE,0xef
  3310. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3311. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3312. CLK_IND, RUN, FREQ_2, 0x70
  3313. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3314. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3315. CRT,RUN,LATCH_DATA, 0x00
  3316.  
  3317. [800,600,16,46,75]
  3318. # Unlock CRTC
  3319. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3320. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3321. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3322. # Dump CRT Controller Registers
  3323. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3324. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3325. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3326. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3327. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3328. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3329. CRT,RUN,MODE_CONTROL,0x02
  3330. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3331. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3332. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3333. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3334. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3335. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3336. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3337. # Lock CRTC Reg 11 for compatibility
  3338. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3339. # Dump ENG Register
  3340. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3341. # Dump MISCOUT Register
  3342. DIR,RUN,MISC_WRITE,0xef
  3343. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3344. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3345. CLK_IND, RUN, FREQ_2, 0x60
  3346. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3347. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3348. CRT,RUN,LATCH_DATA, 0x00
  3349.  
  3350. [800,600,16,48,72]
  3351. # Unlock CRTC
  3352. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3353. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3354. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3355. # Dump CRT Controller Registers
  3356. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3357. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3358. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3359. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3360. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3361. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3362. CRT,RUN,MODE_CONTROL,0x02
  3363. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3364. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3365. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3366. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3367. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3368. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3369. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3370. # Lock CRTC Reg 11 for compatibility
  3371. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3372. # Dump ENG Register
  3373. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3374. # Dump MISCOUT Register
  3375. DIR,RUN,MISC_WRITE,0xef
  3376. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3377. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3378. CLK_IND, RUN, FREQ_2, 0x61
  3379. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3380. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3381. CRT,RUN,LATCH_DATA, 0x00
  3382.  
  3383. [800,600,16,35,56]
  3384. # Unlock CRTC
  3385. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3386. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3387. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3388. # Dump CRT Controller Registers
  3389. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3390. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3391. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3392. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3393. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3394. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3395. CRT,RUN,MODE_CONTROL,0x02
  3396. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3397. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3398. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3399. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3400. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3401. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3402. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3403. # Lock CRTC Reg 11 for compatibility
  3404. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3405. # Dump ENG Register
  3406. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3407. # Dump MISCOUT Register
  3408. DIR,RUN,MISC_WRITE,0xef
  3409. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3410. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3411. CLK_IND, RUN, FREQ_2, 0x45
  3412. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3413. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3414. CRT,RUN,LATCH_DATA, 0x00
  3415.  
  3416. [800,600,16,37,60]
  3417. # Unlock CRTC
  3418. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3419. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3420. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3421. # Dump CRT Controller Registers
  3422. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3423. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3424. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3425. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3426. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3427. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3428. CRT,RUN,MODE_CONTROL,0x02
  3429. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3430. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3431. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3432. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3433. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3434. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3435. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3436. # Lock CRTC Reg 11 for compatibility
  3437. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3438. # Dump ENG Register
  3439. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3440. # Dump MISCOUT Register
  3441. DIR,RUN,MISC_WRITE,0xef
  3442. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3443. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3444. CLK_IND, RUN, FREQ_2, 0x4D
  3445. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3446. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3447. CRT,RUN,LATCH_DATA, 0x00
  3448.  
  3449. [800,600,8,75,120]
  3450. # Unlock CRTC
  3451. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3452. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3453. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3454. # Dump CRT Controller Registers
  3455. CRT,RUN,HORZ_TOTAL,0x39,0x31,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3456. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3457. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3458. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3459. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3460. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3461. CRT,RUN,MODE_CONTROL,0x02
  3462. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3463. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3464. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3465. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3466. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3467. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3468. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3469. # Lock CRTC Reg 11 for compatibility
  3470. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3471. # Dump ENG Register
  3472. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3473. # Dump MISCOUT Register
  3474. DIR,RUN,MISC_WRITE,0xef
  3475. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3476. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3477. CLK_IND, RUN, FREQ_2, 0x8a
  3478. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3479. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3480. CRT,RUN,LATCH_DATA, 0x08
  3481.  
  3482. [800,600,8,64,100]
  3483. # Unlock CRTC
  3484. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3485. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3486. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3487. # Dump CRT Controller Registers
  3488. CRT,RUN,HORZ_TOTAL,0x3a,0x31,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3489. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3490. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3491. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3492. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3493. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3494. CRT,RUN,MODE_CONTROL,0x02
  3495. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3496. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3497. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3498. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3499. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3500. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3501. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3502. # Lock CRTC Reg 11 for compatibility
  3503. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3504. # Dump ENG Register
  3505. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3506. # Dump MISCOUT Register
  3507. DIR,RUN,MISC_WRITE,0xef
  3508. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3509. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3510. CLK_IND, RUN, FREQ_2, 0x7e
  3511. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3512. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3513. CRT,RUN,LATCH_DATA, 0x08
  3514.  
  3515. [800,600,8,56,90]
  3516. # Unlock CRTC
  3517. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3518. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3519. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3520. # Dump CRT Controller Registers
  3521. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3522. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3523. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3524. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3525. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3526. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3527. CRT,RUN,MODE_CONTROL,0x02
  3528. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3529. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3530. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3531. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3532. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3533. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3534. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3535. # Lock CRTC Reg 11 for compatibility
  3536. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3537. # Dump ENG Register
  3538. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3539. # Dump MISCOUT Register
  3540. DIR,RUN,MISC_WRITE,0xef
  3541. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3542. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3543. CLK_IND, RUN, FREQ_2, 0x70
  3544. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3545. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3546. CRT,RUN,LATCH_DATA, 0x08
  3547.  
  3548. [800,600,8,46,75]
  3549. # Unlock CRTC
  3550. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3551. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3552. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3553. # Dump CRT Controller Registers
  3554. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3555. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3556. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3557. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3558. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3559. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3560. CRT,RUN,MODE_CONTROL,0x02
  3561. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3562. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3563. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3564. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3565. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3566. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3567. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3568. # Lock CRTC Reg 11 for compatibility
  3569. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3570. # Dump ENG Register
  3571. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3572. # Dump MISCOUT Register
  3573. DIR,RUN,MISC_WRITE,0xef
  3574. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3575. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3576. CLK_IND, RUN, FREQ_2, 0x60
  3577. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3578. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3579. CRT,RUN,LATCH_DATA, 0x08
  3580.  
  3581. [800,600,8,48,72]
  3582. # Unlock CRTC
  3583. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3584. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3585. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3586. # Dump CRT Controller Registers
  3587. CRT,RUN,HORZ_TOTAL,0x3c,0x31,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3588. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3589. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3590. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3591. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3592. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3593. CRT,RUN,MODE_CONTROL,0x02
  3594. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3595. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3596. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3597. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3598. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3599. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3600. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3601. # Lock CRTC Reg 11 for compatibility
  3602. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3603. # Dump ENG Register
  3604. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3605. # Dump MISCOUT Register
  3606. DIR,RUN,MISC_WRITE,0xef
  3607. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3608. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3609. CLK_IND, RUN, FREQ_2, 0x61
  3610. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3611. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3612. CRT,RUN,LATCH_DATA, 0x08
  3613.  
  3614. [800,600,8,37,60]
  3615. # Unlock CRTC
  3616. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3617. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3618. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3619. # Dump CRT Controller Registers
  3620. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3621. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3622. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3623. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3624. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3625. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3626. CRT,RUN,MODE_CONTROL,0x02
  3627. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3628. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3629. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3630. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3631. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3632. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3633. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3634. # Lock CRTC Reg 11 for compatibility
  3635. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3636. # Dump ENG Register
  3637. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3638. # Dump MISCOUT Register
  3639. DIR,RUN,MISC_WRITE,0xef
  3640. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3641. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3642. CLK_IND, RUN, FREQ_2, 0x4D
  3643. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3644. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3645. CRT,RUN,LATCH_DATA, 0x08
  3646.  
  3647. [800,600,8,35,56]
  3648. # Unlock CRTC
  3649. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3650. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3651. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3652. # Dump CRT Controller Registers
  3653. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3654. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3655. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3656. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3657. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3658. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3659. CRT,RUN,MODE_CONTROL,0x02
  3660. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3661. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3662. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3663. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3664. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3665. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3666. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3667. # Lock CRTC Reg 11 for compatibility
  3668. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3669. # Dump ENG Register
  3670. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3671. # Dump MISCOUT Register
  3672. DIR,RUN,MISC_WRITE,0xef
  3673. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3674. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3675. CLK_IND, RUN, FREQ_2, 0x45
  3676. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3677. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3678. CRT,RUN,LATCH_DATA, 0x08
  3679.  
  3680. [640,480,32,64,120]
  3681. # Unlock CRTC
  3682. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3683. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3684. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3685. # Dump CRT Controller Registers
  3686. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3687. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3688. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3689. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3690. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3691. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3692. CRT,RUN,MODE_CONTROL,0x02
  3693. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3694. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3695. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3696. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3697. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3698. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3699. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3700. # Lock CRTC Reg 11 for compatibility
  3701. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3702. # Dump ENG Register
  3703. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3704. # Dump MISCOUT Register
  3705. DIR,RUN,MISC_WRITE,0xef
  3706. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3707. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3708. CLK_IND, RUN, FREQ_2, 0x67
  3709. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3710. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3711. CRT,RUN,LATCH_DATA, 0x00
  3712.  
  3713. [640,480,32,52,100]
  3714. # Unlock CRTC
  3715. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3716. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3717. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3718. # Dump CRT Controller Registers
  3719. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3720. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3721. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3722. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3723. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3724. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3725. CRT,RUN,MODE_CONTROL,0x02
  3726. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3727. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3728. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3729. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3730. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3731. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3732. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3733. # Lock CRTC Reg 11 for compatibility
  3734. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3735. # Dump ENG Register
  3736. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3737. # Dump MISCOUT Register
  3738. DIR,RUN,MISC_WRITE,0xef
  3739. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3740. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3741. CLK_IND, RUN, FREQ_2, 0x50
  3742. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3743. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3744. CRT,RUN,LATCH_DATA, 0x00
  3745.  
  3746. [640,480,32,48,90]
  3747. # Unlock CRTC
  3748. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3749. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3750. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3751. # Dump CRT Controller Registers
  3752. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3753. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3754. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3755. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3756. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3757. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3758. CRT,RUN,MODE_CONTROL,0x02
  3759. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3760. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3761. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3762. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3763. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3764. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3765. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3766. # Lock CRTC Reg 11 for compatibility
  3767. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3768. # Dump ENG Register
  3769. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3770. # Dump MISCOUT Register
  3771. DIR,RUN,MISC_WRITE,0xef
  3772. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3773. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3774. CLK_IND, RUN, FREQ_2, 0x4d
  3775. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3776. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3777. CRT,RUN,LATCH_DATA, 0x00
  3778.  
  3779. [640,480,32,37,75]
  3780. # Unlock CRTC
  3781. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3782. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3783. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3784. # Dump CRT Controller Registers
  3785. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3786. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3787. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3788. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3789. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3790. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3791. CRT,RUN,MODE_CONTROL,0x02
  3792. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3793. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3794. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3795. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3796. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3797. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3798. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3799. # Lock CRTC Reg 11 for compatibility
  3800. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3801. # Dump ENG Register
  3802. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3803. # Dump MISCOUT Register
  3804. DIR,RUN,MISC_WRITE,0xef
  3805. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3806. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3807. CLK_IND, RUN, FREQ_2, 0x3a
  3808. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3809. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3810. CRT,RUN,LATCH_DATA, 0x00
  3811.  
  3812. [640,480,32,37,72]
  3813. # Unlock CRTC
  3814. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3815. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3816. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3817. # Dump CRT Controller Registers
  3818. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3819. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3820. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3821. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3822. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3823. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3824. CRT,RUN,MODE_CONTROL,0x02
  3825. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3826. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3827. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3828. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3829. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3830. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3831. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3832. # Lock CRTC Reg 11 for compatibility
  3833. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3834. # Dump ENG Register
  3835. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3836. # Dump MISCOUT Register
  3837. DIR,RUN,MISC_WRITE,0xef
  3838. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3839. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3840. CLK_IND, RUN, FREQ_2, 0x3a
  3841. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3842. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3843. CRT,RUN,LATCH_DATA, 0x00
  3844.  
  3845. [640,480,32,31,60]
  3846. # Unlock CRTC
  3847. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3848. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3849. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3850. # Dump CRT Controller Registers
  3851. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3852. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3853. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3854. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3855. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3856. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3857. CRT,RUN,MODE_CONTROL,0x02
  3858. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3859. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3860. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3861. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3862. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3863. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3864. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3865. # Lock CRTC Reg 11 for compatibility
  3866. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3867. # Dump ENG Register
  3868. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3869. # Dump MISCOUT Register
  3870. DIR,RUN,MISC_WRITE,0xef
  3871. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3872. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3873. CLK_IND, RUN, FREQ_2, 0x21
  3874. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3875. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3876. CRT,RUN,LATCH_DATA, 0x00
  3877.  
  3878. [640,480,24,64,120]
  3879. # Unlock CRTC
  3880. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3881. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3882. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3883. # Dump CRT Controller Registers
  3884. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3e,0x04,0x12,0x3e,0x00,0x40
  3885. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3886. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3887. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  3888. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3889. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  3890. CRT,RUN,MODE_CONTROL,0x02
  3891. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3892. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3893. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3894. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3895. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3896. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3897. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3898. # Lock CRTC Reg 11 for compatibility
  3899. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3900. # Dump ENG Register
  3901. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3902. # Dump MISCOUT Register
  3903. DIR,RUN,MISC_WRITE,0xef
  3904. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3905. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3906. CLK_IND, RUN, FREQ_2, 0x67
  3907. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3908. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3909. CRT,RUN,LATCH_DATA, 0x00
  3910.  
  3911.  
  3912. [640,480,24,52,100]
  3913. # Unlock CRTC
  3914. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3915. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3916. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3917. # Dump CRT Controller Registers
  3918. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  3919. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3920. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3921. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  3922. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3923. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3924. CRT,RUN,MODE_CONTROL,0x02
  3925. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3926. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3927. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3928. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3929. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3930. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3931. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3932. # Lock CRTC Reg 11 for compatibility
  3933. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3934. # Dump ENG Register
  3935. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3936. # Dump MISCOUT Register
  3937. DIR,RUN,MISC_WRITE,0xef
  3938. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3939. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3940. CLK_IND, RUN, FREQ_2, 0x50
  3941. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3942. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3943. CRT,RUN,LATCH_DATA, 0x00
  3944.  
  3945. [640,480,24,48,90]
  3946. # Unlock CRTC
  3947. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3948. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3949. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3950. # Dump CRT Controller Registers
  3951. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  3952. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3953. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3954. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3955. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3956. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3957. CRT,RUN,MODE_CONTROL,0x02
  3958. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3959. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3960. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3961. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3962. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3963. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3964. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3965. # Lock CRTC Reg 11 for compatibility
  3966. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3967. # Dump ENG Register
  3968. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3969. # Dump MISCOUT Register
  3970. DIR,RUN,MISC_WRITE,0xef
  3971. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3972. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3973. CLK_IND, RUN, FREQ_2, 0x4d
  3974. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3975. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3976. CRT,RUN,LATCH_DATA, 0x00
  3977.  
  3978.  
  3979. [640,480,24,37,75]
  3980. # Unlock CRTC
  3981. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3982. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3983. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3984. # Dump CRT Controller Registers
  3985. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x40,0x04,0xf7,0x1f,0x00,0x40
  3986. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3987. CRT,RUN,VERT_RETRACE_START,0xe6,0x09,0xdf
  3988. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf7,0xab,0xff
  3989. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3990. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3991. CRT,RUN,MODE_CONTROL,0x02
  3992. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3993. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3994. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3995. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3996. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3997. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3998. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3999. # Lock CRTC Reg 11 for compatibility
  4000. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4001. # Dump ENG Register
  4002. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4003. # Dump MISCOUT Register
  4004. DIR,RUN,MISC_WRITE,0xef
  4005. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4006. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4007. CLK_IND, RUN, FREQ_2, 0x3a
  4008. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4009. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4010. CRT,RUN,LATCH_DATA, 0x00
  4011.  
  4012.  
  4013. [640,480,24,37,72]
  4014. # Unlock CRTC
  4015. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4016. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4017. CRT,RUN,REG_LOCK_1,0x48,0xa0
  4018. # Dump CRT Controller Registers
  4019. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3e,0x02,0x06,0x3e,0x00,0x40
  4020. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4021. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4022. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4023. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4024. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  4025. CRT,RUN,MODE_CONTROL,0x02
  4026. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4027. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4028. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4029. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4030. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4031. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4032. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4033. # Lock CRTC Reg 11 for compatibility
  4034. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4035. # Dump ENG Register
  4036. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4037. # Dump MISCOUT Register
  4038. DIR,RUN,MISC_WRITE,0xef
  4039. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4040. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4041. CLK_IND, RUN, FREQ_2, 0x3a
  4042. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4043. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4044. CRT,RUN,LATCH_DATA, 0x00
  4045.  
  4046. [640,480,24,31,60]
  4047. # Unlock CRTC
  4048. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4049. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4050. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4051. # Dump CRT Controller Registers
  4052. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8a,0x3d,0x06,0x0b,0x3e,0x00,0x40
  4053. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4054. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4055. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4056. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4057. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  4058. CRT,RUN,MODE_CONTROL,0x02
  4059. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4060. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4061. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4062. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4063. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4064. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4065. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4066. # Lock CRTC Reg 11 for compatibility
  4067. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4068. # Dump ENG Register
  4069. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4070. # Dump MISCOUT Register
  4071. DIR,RUN,MISC_WRITE,0xef
  4072. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4073. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4074. CLK_IND, RUN, FREQ_2, 0x21
  4075. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4076. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4077. CRT,RUN,LATCH_DATA, 0x00
  4078.  
  4079. [640,480,16,64,120]
  4080. # Unlock CRTC
  4081. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4082. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4083. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4084. # Dump CRT Controller Registers
  4085. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4086. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4087. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  4088. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  4089. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4090. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4091. CRT,RUN,MODE_CONTROL,0x02
  4092. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4093. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4094. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4095. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4096. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4097. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4098. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4099. # Lock CRTC Reg 11 for compatibility
  4100. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4101. # Dump ENG Register
  4102. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4103. # Dump MISCOUT Register
  4104. DIR,RUN,MISC_WRITE,0xef
  4105. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4106. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4107. CLK_IND, RUN, FREQ_2, 0x67
  4108. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4109. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4110. CRT,RUN,LATCH_DATA, 0x00
  4111.  
  4112. [640,480,16,52,100]
  4113. # Unlock CRTC
  4114. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4115. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4116. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4117. # Dump CRT Controller Registers
  4118. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  4119. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4120. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  4121. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  4122. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4123. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  4124. CRT,RUN,MODE_CONTROL,0x02
  4125. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4126. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4127. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4128. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4129. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4130. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4131. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4132. # Lock CRTC Reg 11 for compatibility
  4133. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4134. # Dump ENG Register
  4135. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4136. # Dump MISCOUT Register
  4137. DIR,RUN,MISC_WRITE,0xef
  4138. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4139. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4140. CLK_IND, RUN, FREQ_2, 0x50
  4141. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4142. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4143. CRT,RUN,LATCH_DATA, 0x00
  4144.  
  4145. [640,480,16,48,90]
  4146. # Unlock CRTC
  4147. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4148. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4149. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4150. # Dump CRT Controller Registers
  4151. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4152. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4153. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4154. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4155. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4156. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4157. CRT,RUN,MODE_CONTROL,0x02
  4158. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4159. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4160. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4161. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4162. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4163. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4164. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4165. # Lock CRTC Reg 11 for compatibility
  4166. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4167. # Dump ENG Register
  4168. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4169. # Dump MISCOUT Register
  4170. DIR,RUN,MISC_WRITE,0xef
  4171. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4172. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4173. CLK_IND, RUN, FREQ_2, 0x4d
  4174. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4175. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4176. CRT,RUN,LATCH_DATA, 0x00
  4177.  
  4178. [640,480,16,37,75]
  4179. # Unlock CRTC
  4180. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4181. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4182. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4183. # Dump CRT Controller Registers
  4184. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4185. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4186. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4187. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4188. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4189. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4190. CRT,RUN,MODE_CONTROL,0x02
  4191. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4192. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4193. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4194. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4195. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4196. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4197. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4198. # Lock CRTC Reg 11 for compatibility
  4199. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4200. # Dump ENG Register
  4201. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4202. # Dump MISCOUT Register
  4203. DIR,RUN,MISC_WRITE,0xef
  4204. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4205. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4206. CLK_IND, RUN, FREQ_2, 0x3a
  4207. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4208. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4209. CRT,RUN,LATCH_DATA, 0x00
  4210.  
  4211. [640,480,16,37,72]
  4212. # Unlock CRTC
  4213. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4214. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4215. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4216. # Dump CRT Controller Registers
  4217. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4218. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4219. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4220. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4221. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4222. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4223. CRT,RUN,MODE_CONTROL,0x02
  4224. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4225. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4226. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4227. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4228. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4229. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4230. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4231. # Lock CRTC Reg 11 for compatibility
  4232. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4233. # Dump ENG Register
  4234. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4235. # Dump MISCOUT Register
  4236. DIR,RUN,MISC_WRITE,0xef
  4237. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4238. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4239. CLK_IND, RUN, FREQ_2, 0x3a
  4240. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4241. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4242. CRT,RUN,LATCH_DATA, 0x00
  4243.  
  4244. [640,480,16,31,60]
  4245. # Unlock CRTC
  4246. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4247. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4248. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4249. # Dump CRT Controller Registers
  4250. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4251. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4252. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4253. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4254. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4255. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4256. CRT,RUN,MODE_CONTROL,0x02
  4257. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4258. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4259. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4260. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4261. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4262. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4263. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4264. # Lock CRTC Reg 11 for compatibility
  4265. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4266. # Dump ENG Register
  4267. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4268. # Dump MISCOUT Register
  4269. DIR,RUN,MISC_WRITE,0xef
  4270. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4271. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4272. CLK_IND, RUN, FREQ_2, 0x21
  4273. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4274. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4275. CRT,RUN,LATCH_DATA, 0x00
  4276.  
  4277. [640,480,8,64,120]
  4278. # Unlock CRTC
  4279. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4280. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4281. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4282. # Dump CRT Controller Registers
  4283. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4284. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4285. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  4286. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  4287. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4288. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4289. CRT,RUN,MODE_CONTROL,0x02
  4290. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4291. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4292. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4293. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4294. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4295. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4296. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4297. # Lock CRTC Reg 11 for compatibility
  4298. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4299. # Dump ENG Register
  4300. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4301. # Dump MISCOUT Register
  4302. DIR,RUN,MISC_WRITE,0xef
  4303. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4304. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4305. CLK_IND, RUN, FREQ_2, 0x67
  4306. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4307. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4308. CRT,RUN,LATCH_DATA, 0x08
  4309.  
  4310. [640,480,8,52,100]
  4311. # Unlock CRTC
  4312. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4313. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4314. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4315. # Dump CRT Controller Registers
  4316. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  4317. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4318. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  4319. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  4320. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4321. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  4322. CRT,RUN,MODE_CONTROL,0x02
  4323. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4324. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4325. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4326. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4327. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4328. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4329. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4330. # Lock CRTC Reg 11 for compatibility
  4331. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4332. # Dump ENG Register
  4333. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4334. # Dump MISCOUT Register
  4335. DIR,RUN,MISC_WRITE,0xef
  4336. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4337. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4338. CLK_IND, RUN, FREQ_2, 0x50
  4339. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4340. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4341. CRT,RUN,LATCH_DATA, 0x08
  4342.  
  4343. [640,480,8,48,90]
  4344. # Unlock CRTC
  4345. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4346. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4347. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4348. # Dump CRT Controller Registers
  4349. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4350. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4351. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4352. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4353. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4354. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4355. CRT,RUN,MODE_CONTROL,0x02
  4356. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4357. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4358. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4359. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4360. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4361. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4362. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4363. # Lock CRTC Reg 11 for compatibility
  4364. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4365. # Dump ENG Register
  4366. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4367. # Dump MISCOUT Register
  4368. DIR,RUN,MISC_WRITE,0xef
  4369. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4370. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4371. CLK_IND, RUN, FREQ_2, 0x4d
  4372. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4373. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4374. CRT,RUN,LATCH_DATA, 0x08
  4375.  
  4376. [640,480,8,37,75]
  4377. # Unlock CRTC
  4378. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4379. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4380. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4381. # Dump CRT Controller Registers
  4382. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4383. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4384. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4385. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4386. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4387. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4388. CRT,RUN,MODE_CONTROL,0x02
  4389. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4390. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4391. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4392. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4393. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4394. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4395. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4396. # Lock CRTC Reg 11 for compatibility
  4397. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4398. # Dump ENG Register
  4399. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4400. # Dump MISCOUT Register
  4401. DIR,RUN,MISC_WRITE,0xef
  4402. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4403. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4404. CLK_IND, RUN, FREQ_2, 0x3a
  4405. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4406. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4407. CRT,RUN,LATCH_DATA, 0x08
  4408.  
  4409. [640,480,8,37,72]
  4410. # Unlock CRTC
  4411. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4412. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4413. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4414. # Dump CRT Controller Registers
  4415. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4416. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4417. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4418. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4419. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4420. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4421. CRT,RUN,MODE_CONTROL,0x02
  4422. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4423. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4424. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4425. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4426. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4427. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4428. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4429. # Lock CRTC Reg 11 for compatibility
  4430. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4431. # Dump ENG Register
  4432. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4433. # Dump MISCOUT Register
  4434. DIR,RUN,MISC_WRITE,0xef
  4435. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4436. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4437. CLK_IND, RUN, FREQ_2, 0x3a
  4438. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4439. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4440. CRT,RUN,LATCH_DATA, 0x08
  4441.  
  4442. [640,480,8,31,60]
  4443. # Unlock CRTC
  4444. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4445. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4446. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4447. # Dump CRT Controller Registers
  4448. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4449. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4450. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4451. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4452. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4453. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4454. CRT,RUN,MODE_CONTROL,0x02
  4455. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4456. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4457. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4458. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4459. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4460. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4461. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4462. # Lock CRTC Reg 11 for compatibility
  4463. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4464. # Dump ENG Register
  4465. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4466. # Dump MISCOUT Register
  4467. DIR,RUN,MISC_WRITE,0xef
  4468. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4469. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4470. CLK_IND, RUN, FREQ_2, 0x21
  4471. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4472. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4473. CRT,RUN,LATCH_DATA, 0x08
  4474.  
  4475.  
  4476.  
  4477.  
  4478.  
  4479.  
  4480.